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authorElyes HAOUAS <ehaouas@noos.fr>2019-07-14 08:24:57 +0200
committerNico Huber <nico.h@gmx.de>2019-07-17 20:56:18 +0000
commit4593d66a20d6acc78ae81db384f7df5212766985 (patch)
treee657cfb0bdee2421f591f37c3e8348607fdc63f6
parentb944516f66e253a325bd3c071f8810b7bd3e0416 (diff)
downloadcoreboot-4593d66a20d6acc78ae81db384f7df5212766985.tar.xz
nb/i945: Fix gate graphics hardware for frequency change
The GCFC (Graphics Clock Frequency Control) read is not used at the line below. As the default value is zero, let's remove unused read. Found-by: scan-build 7.0.1-8 Change-Id: I82c567e3a5b0c0c4a8596ea0cb7693667c71b720 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34329 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r--src/northbridge/intel/i945/raminit.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index c42c34cf39..dd9843300f 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -1657,7 +1657,6 @@ static void sdram_program_graphics_frequency(struct sys_info *sysinfo)
printk(BIOS_DEBUG, "Voltage: %s ", (voltage == VOLTAGE_1_05)?"1.05V":"1.5V");
/* Gate graphics hardware for frequency change */
- reg8 = pci_read_config16(PCI_DEV(0, 2, 0), GCFC + 1);
reg8 = (1<<3) | (1<<1); /* disable crclk, gate cdclk */
pci_write_config8(PCI_DEV(0, 2, 0), GCFC + 1, reg8);