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authorAaron Durbin <adurbin@chromium.org>2016-09-01 17:46:41 -0500
committerMartin Roth <martinroth@google.com>2016-09-04 05:33:59 +0200
commit48b4cbdd94f1e126314eb055cd387011e7875845 (patch)
treeb5fe5ea842d36fe87bb36509c7c3656ed911079b
parent2128d625caa4155a73f5b6db23413bddc1d9ab82 (diff)
downloadcoreboot-48b4cbdd94f1e126314eb055cd387011e7875845.tar.xz
mainboard/google/reef: remove unused gpio.h macros
Some of the macros in gpio.h are no longer used because devicetree.cb is being used to autogeneric the ACPI AML. Therefore remove the unused macros. BUG=chrome-os-partner:56677 Change-Id: I433a929229a0318f6c1df652655d046a5152cc63 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16412 Tested-by: build bot (Jenkins) Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
-rw-r--r--src/mainboard/google/reef/gpio.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h
index 775d08977c..9f0722599c 100644
--- a/src/mainboard/google/reef/gpio.h
+++ b/src/mainboard/google/reef/gpio.h
@@ -18,12 +18,6 @@
#include <soc/gpio.h>
-/* Input device interrupt configuration */
-#define TOUCHPAD_INT GPIO_18_IRQ
-
-#define BOARD_HP_MIC_CODEC_IRQ GPIO_116_IRQ
-#define BOARD_HP_MIC_CODEC_I2C_ADDR 0x1a
-
#ifndef __ACPI__
/*
* Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'