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| author | Duncan Laurie <dlaurie@google.com> | 2018-12-05 15:38:13 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-07 11:18:55 +0000 |
| commit | 4afefd648b28d4ebabd6d07790037e3e00c9ff03 (patch) | |
| tree | 18c0988994f5dbff38ffba21fd49f080383aa2af | |
| parent | 695f2feaf8f9dd7e77749cdafbd6422fffc2be3e (diff) | |
| download | coreboot-4afefd648b28d4ebabd6d07790037e3e00c9ff03.tar.xz | |
drivers/i2c/designware: Add soc_clock entry for 216MHz
Add an entry to the soc_clock table for a 216MHz clock so that
the I2C controller clock is calculated correctly when the I2C
bus is used in coreboot.
This was tested by measuring the I2C clock speed on H1 I2C bus
on a sarien board in coreboot and ensuring it is ~400KHz.
Change-Id: I6c3cacdad318a5ce41bc41e3ac81385c2d4f396c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/30068
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/drivers/i2c/designware/dw_i2c.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index d190d869e2..46df7b1a2c 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -217,6 +217,13 @@ static const struct soc_clock { .ns = 3000, }, }, + { + .clk_speed_mhz = 216, + .freq = { + .ticks = 1080, + .ns = 5000, + }, + }, }; static const struct i2c_descriptor *get_bus_descriptor(enum i2c_speed speed) |