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authorMaxim Polyakov <max.senia.poliak@gmail.com>2019-08-21 19:05:13 +0300
committerPatrick Georgi <pgeorgi@google.com>2019-09-09 13:28:08 +0000
commit50f4c5ae33b0a4a7fc6e2737d4976eb664a90ef7 (patch)
tree6de85156f7ac212ebac53a2ff8f265cb23f9904f
parenta433da754ab42083d1885d60bb819a28728e3b29 (diff)
downloadcoreboot-50f4c5ae33b0a4a7fc6e2737d4976eb664a90ef7.tar.xz
mb/asrock/h110m: disable unused sata ports
Sets all unused sata ports to disable in the device tree Note: SATA4 and SATA5 are located at the bottom of the board, but there is no connector for this. Apparently, a board with an increased number of ports is very rare. Perhaps this is a separate variant of the Asrock motherboard. For this reason, these ports are also disabled Change-Id: I5b3ad372f1d6607cc7b4a78e3c59d2a5ae1d2cf5 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35071 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/mainboard/asrock/h110m/devicetree.cb10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index 47d534a99b..1240d39c1e 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -182,11 +182,13 @@ chip soc/intel/skylake
[1] = 1, \
[2] = 1, \
[3] = 1, \
- [4] = 1, \
- [5] = 1, \
- [6] = 1, \
- [7] = 1, \
+ [4] = 0, \
+ [5] = 0, \
+ [6] = 0, \
+ [7] = 0, \
}"
+ # SATA4 and SATA5 are located in the lower right corner
+ # of the board, but there is no connector for this
# PCH UART, SPI, I2C
register "SerialIoDevMode" = "{ \