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authorSubrata Banik <subrata.banik@intel.com>2017-08-10 14:34:35 +0530
committerAaron Durbin <adurbin@chromium.org>2017-08-14 17:58:54 +0000
commit6037b200d1fc4a55bac202a0ce833b2fa0624436 (patch)
tree80336e98746bd0890602d45c68b70b8caee1e276
parent4277667499d32e87079cecea1d43c2e612b1535d (diff)
downloadcoreboot-6037b200d1fc4a55bac202a0ce833b2fa0624436.tar.xz
soc/intel/cannonlake: Remove unused systemagent registers
This patch to make code cleaner and remove unused systemagent register macros. [same as KBL implementation] Change-Id: I13b9c83097fc98183ea138c9087b5fc7834efd58 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/20942 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/soc/intel/cannonlake/include/soc/systemagent.h58
1 files changed, 0 insertions, 58 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/systemagent.h b/src/soc/intel/cannonlake/include/soc/systemagent.h
index 09b4b324e3..1902314482 100644
--- a/src/soc/intel/cannonlake/include/soc/systemagent.h
+++ b/src/soc/intel/cannonlake/include/soc/systemagent.h
@@ -19,36 +19,11 @@
#define SOC_CANNONLAKE_SYSTEMAGENT_H
#include <intelblocks/systemagent.h>
-#include <soc/iomap.h>
/* Device 0:0.0 PCI configuration space */
#define EPBAR 0x40
-#define PCIEXBAR 0x60
#define DMIBAR 0x68
-#define GGC 0x50 /* GMCH Graphics Control */
-#define DEVEN 0x54 /* Device Enable */
-#define DEVEN_D7EN (1 << 14)
-#define DEVEN_D4EN (1 << 7)
-#define DEVEN_D3EN (1 << 5)
-#define DEVEN_D2EN (1 << 4)
-#define DEVEN_D1F0EN (1 << 3)
-#define DEVEN_D1F1EN (1 << 2)
-#define DEVEN_D1F2EN (1 << 1)
-#define DEVEN_D0EN (1 << 0)
-#define DPR 0x5c
-#define DPR_EPM (1 << 2)
-#define DPR_PRS (1 << 1)
-#define DPR_SIZE_MASK 0xff0
-
-#define PAM0 0x80
-#define PAM1 0x81
-#define PAM2 0x82
-#define PAM3 0x83
-#define PAM4 0x84
-#define PAM5 0x85
-#define PAM6 0x86
-
#define SMRAM 0x88 /* System Management RAM Control */
#define D_OPEN (1 << 6)
#define D_CLS (1 << 5)
@@ -56,23 +31,8 @@
#define G_SMRAME (1 << 3)
#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
-#define MESEG_BASE 0x70 /* Management Engine Base. */
-#define MESEG_LIMIT 0x78 /* Management Engine Limit. */
-#define TOM 0xa0 /* Top of DRAM in memory controller space. */
-#define SKPAD 0xdc /* Scratchpad Data */
-
-/* MCHBAR */
-
-#define MCHBAR8(x) (*(volatile u8 *)(MCH_BASE_ADDRESS + x))
-#define MCHBAR16(x) (*(volatile u16 *)(MCH_BASE_ADDRESS + x))
-#define MCHBAR32(x) (*(volatile u32 *)(MCH_BASE_ADDRESS + x))
-
-#define MCHBAR_PEI_VERSION 0x5034
-#define REMAPBASE 0x5090 /* Remap base. */
-#define REMAPLIMIT 0x5098 /* Remap limit. */
#define BIOS_RESET_CPL 0x5da8
#define EDRAMBAR 0x5408
-#define MCH_PAIR 0x5418
#define REGBAR 0x5420
#define MCH_PKG_POWER_LIMIT_LO 0x59a0
@@ -80,22 +40,4 @@
#define MCH_DDR_POWER_LIMIT_LO 0x58e0
#define MCH_DDR_POWER_LIMIT_HI 0x58e4
-/* PCODE MMIO communications live in the MCHBAR. */
-#define BIOS_MAILBOX_INTERFACE 0x5da4
-#define MAILBOX_RUN_BUSY (1 << 31)
-/* Errors are returned back in bits 7:0. */
-#define MAILBOX_BIOS_ERROR_NONE 0
-#define MAILBOX_BIOS_ERROR_INVALID_COMMAND 1
-#define MAILBOX_BIOS_ERROR_TIMEOUT 2
-#define MAILBOX_BIOS_ERROR_ILLEGAL_DATA 3
-#define MAILBOX_BIOS_ERROR_RESERVED 4
-#define MAILBOX_BIOS_ERROR_ILLEGAL_VR_ID 5
-#define MAILBOX_BIOS_ERROR_VR_INTERFACE_LOCKED 6
-#define MAILBOX_BIOS_ERROR_VR_ERROR 7
-/* Data is passed through bits 31:0 of the data register. */
-#define BIOS_MAILBOX_DATA 0x5da0
-
-/* System Agent identification */
-u8 systemagent_revision(void);
-
#endif