summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPatrick Georgi <pgeorgi@google.com>2018-11-16 18:00:12 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-17 13:27:43 +0000
commit68aed91eb953fa4cab8c802c41c4d6d980d953c1 (patch)
treeba71af03eeef7837b2a64acb4ddc143cabdfcee0
parent8ad5a62de94c40aa5ad757d8a7238b029dafa959 (diff)
downloadcoreboot-68aed91eb953fa4cab8c802c41c4d6d980d953c1.tar.xz
intel/i945: Fix booting on a dual channel configuration
The register values in dram width programming changed in commit a4fc7bef7ffab0 which broke booting on getac/p470. TEST=getac/p470 with 2 X8DDS DRAM boots again Change-Id: I8b3eedc8c5234e8a28948d4dc58bf565024f62ce Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Elyes HAOUAS <ehaouas@noos.fr>
-rw-r--r--src/northbridge/intel/i945/raminit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 30e16dbb48..5f06b7df66 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -660,13 +660,13 @@ static void sdram_program_dram_width(struct sys_info *sysinfo)
c1dramw |= (0x0000) << 4*(i % 2);
break;
case SYSINFO_DIMM_X8DS:
- c1dramw |= (0x0001) << 4*(i % 2);
+ c1dramw |= (0x0010) << 4*(i % 2);
break;
case SYSINFO_DIMM_X16SS:
c1dramw |= (0x0000) << 4*(i % 2);
break;
case SYSINFO_DIMM_X8DDS:
- c1dramw |= (0x0005) << 4*(i % 2);
+ c1dramw |= (0x0050) << 4*(i % 2);
break;
case SYSINFO_DIMM_NOT_POPULATED:
c1dramw |= (0x0000) << 4*(i % 2);