src: Move 'static' to the beginning of declaration

Change-Id: I9b2cc1bb58922d9e32202ea4c20b9aacfe308bad
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

6 files changed, 12 insertions, 12 deletions

diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
index 57b1aecef1..c56b537f9d 100644
--- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h
+++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
@@ -212,7 +212,7 @@
  */
 #define GEC_CONFIG			0
 
-const static CODECENTRY gizmo_codec_alc272[] =
+static const CODECENTRY gizmo_codec_alc272[] =
 {
 	/* NID, PinConfig */
 	{0x11, 0x411111F0},	/* S/PDIF-OUT2 unused */
diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c
index ed372b538f..d48601d300 100644
--- a/src/northbridge/intel/x4x/dq_dqs.c
+++ b/src/northbridge/intel/x4x/dq_dqs.c
@@ -88,7 +88,7 @@ static void set_db(const struct sysinfo *s, struct dll_setting *dq_dqs_setting)
 	}
 }
 
-const static u8 max_tap[3] = {12, 10, 13};
+static const u8 max_tap[3] = {12, 10, 13};
 
 static int increment_dq_dqs(const struct sysinfo *s,
 			struct dll_setting *dq_dqs_setting)
@@ -540,7 +540,7 @@ static void set_rank_write_level(struct sysinfo *s, u8 channel, u8 config,
 	u32 emrs1;
 
 	/* Is shifted by bits 2 later so u8 can be used to reduce size */
-	const static u8 emrs1_lut[8][4][4]={ /* [Config][Leveling Rank][Rank] */
+	static const u8 emrs1_lut[8][4][4] = { /* [Config][Leveling Rank][Rank] */
 		{  /* Config 0: 2R2R */
 			{0x11, 0x00, 0x91, 0x00},
 			{0x00, 0x11, 0x91, 0x00},
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index efdcbb637a..dd48d8ab63 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -437,7 +437,7 @@ static void program_timings(struct sysinfo *s)
 		5200
 	};
 
-	const static u8 ddr3_turnaround_tab[3][6][4] = {
+	static const u8 ddr3_turnaround_tab[3][6][4] = {
 		{ /* DDR3 800 */
 			{0x9, 0x7, 0x7, 0x9},	/* CL = 5 */
 			{0x9, 0x7, 0x8, 0x8},	/* CL = 6 */
@@ -459,7 +459,7 @@ static void program_timings(struct sysinfo *s)
 	};
 
 	/* [DDR freq][0x26F & 1][pagemod] */
-	const static u8 ddr2_x252_tab[2][2][2] =  {
+	static const u8 ddr2_x252_tab[2][2][2] =  {
 		{ /* DDR2 667 */
 			{12, 16},
 			{14, 18}
@@ -470,7 +470,7 @@ static void program_timings(struct sysinfo *s)
 		}
 	};
 
-	const static u8 ddr3_x252_tab[3][2][2] =  {
+	static const u8 ddr3_x252_tab[3][2][2] =  {
 		{ /* DDR3 800 */
 			{16, 20},
 			{18, 22}
diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c
index 2fbb30b008..0afd00d6cc 100644
--- a/src/security/vboot/secdata_tpm.c
+++ b/src/security/vboot/secdata_tpm.c
@@ -133,7 +133,7 @@ static const uint8_t rec_hash_data[REC_HASH_NV_SIZE] = { };
  * i.e. those which should not be possible to delete or modify once
  * the RO exits, and the rest of the NVRAM spaces.
  */
-const static TPMA_NV ro_space_attributes = {
+static const TPMA_NV ro_space_attributes = {
 	.TPMA_NV_PPWRITE = 1,
 	.TPMA_NV_AUTHREAD = 1,
 	.TPMA_NV_PPREAD = 1,
@@ -142,7 +142,7 @@ const static TPMA_NV ro_space_attributes = {
 	.TPMA_NV_POLICY_DELETE = 1,
 };
 
-const static TPMA_NV rw_space_attributes = {
+static const TPMA_NV rw_space_attributes = {
 	.TPMA_NV_PPWRITE = 1,
 	.TPMA_NV_AUTHREAD = 1,
 	.TPMA_NV_PPREAD = 1,
@@ -153,7 +153,7 @@ const static TPMA_NV rw_space_attributes = {
  * This policy digest was obtained using TPM2_PolicyPCR
  * selecting only PCR_0 with a value of all zeros.
  */
-const static uint8_t pcr0_unchanged_policy[] = {
+static const uint8_t pcr0_unchanged_policy[] = {
 	0x09, 0x93, 0x3C, 0xCE, 0xEB, 0xB4, 0x41, 0x11, 0x18, 0x81, 0x1D,
 	0xD4, 0x47, 0x78, 0x80, 0x08, 0x88, 0x86, 0x62, 0x2D, 0xD7, 0x79,
 	0x94, 0x46, 0x62, 0x26, 0x68, 0x8E, 0xEE, 0xE6, 0x6A, 0xA1};
diff --git a/src/security/vboot/vboot_crtm.c b/src/security/vboot/vboot_crtm.c
index e4266b2ca9..f68ab0a4bc 100644
--- a/src/security/vboot/vboot_crtm.c
+++ b/src/security/vboot/vboot_crtm.c
@@ -29,7 +29,7 @@ static int create_tcpa_metadata(const struct region_device *rdev,
 {
 	int i;
 	struct region_device fmap;
-	const static char *fmap_cbfs_names[] = {
+	static const char *fmap_cbfs_names[] = {
 	"COREBOOT",
 	"FW_MAIN_A",
 	"FW_MAIN_B",
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index d7a09aaf57..8556790772 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -43,7 +43,7 @@
  * waiting for each device to become available, a single delay will be
  * executed.
  */
-const static struct stoneyridge_aoac aoac_devs[] = {
+static const struct stoneyridge_aoac aoac_devs[] = {
 	{ (FCH_AOAC_D3_CONTROL_UART0 + CONFIG_UART_FOR_CONSOLE * 2),
 		(FCH_AOAC_D3_STATE_UART0 + CONFIG_UART_FOR_CONSOLE * 2) },
 	{ FCH_AOAC_D3_CONTROL_AMBA, FCH_AOAC_D3_STATE_AMBA },
@@ -115,7 +115,7 @@ void SetFchMidParams(FCH_INTERFACE *params)
  * amd_pci_int_defs.h, just add the pair at the end of this table.
  * Order is not important.
  */
-const static struct irq_idx_name irq_association[] = {
+static const struct irq_idx_name irq_association[] = {
 	{ PIRQ_A,	"INTA#" },
 	{ PIRQ_B,	"INTB#" },
 	{ PIRQ_C,	"INTC#" },