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authorHannah Williams <hannah.williams@intel.com>2016-01-17 23:22:12 -0800
committerMartin Roth <martinroth@google.com>2016-01-28 20:40:01 +0100
commit731e463495b0ebcf16515172b0bded02e318ce9d (patch)
treea57915de4292c50746e908531fb2d392941bc99c
parent79445c72b2a338581f72f1bbe0f5897b38855a5f (diff)
downloadcoreboot-731e463495b0ebcf16515172b0bded02e318ce9d.tar.xz
intel/cyan: Disable SD Card Detect Simulation in FSP
CQ-DEPEND=CL:12742 Change-Id: Ifc95809e342d87f863dd60967f5b3a6ca5c0f7b3 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/13036 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
-rwxr-xr-xsrc/mainboard/google/cyan/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/cyan/devicetree.cb b/src/mainboard/google/cyan/devicetree.cb
index 8932cf4391..9d14ba6cee 100755
--- a/src/mainboard/google/cyan/devicetree.cb
+++ b/src/mainboard/google/cyan/devicetree.cb
@@ -70,6 +70,7 @@ chip soc/intel/braswell
register "PMIC_I2CBus" = "0"
register "ISPEnable" = "0" # Disable IUNIT
register "ISPPciDevConfig" = "3"
+ register "PcdSdDetectChk" = "0" # Disable SD card detect
# LPE audio codec settings
register "lpe_codec_clk_src" = "LPE_CLK_SRC_XTAL" # 19.2MHz clock