diff options
| author | Wonkyu Kim <wonkyu.kim@intel.com> | 2020-01-08 14:25:55 -0800 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-01-17 06:28:52 +0000 |
| commit | 8d6eae5d6d601934bc85fc07040af0dd853058b8 (patch) | |
| tree | 3baac047dbcc5029f31dc12bad864acb506f82d0 | |
| parent | 5abeb06a73c6f3073f2796a726ea6dc7fb584371 (diff) | |
| download | coreboot-8d6eae5d6d601934bc85fc07040af0dd853058b8.tar.xz | |
mb/tglrvp: update gpio pin mux for NVMe
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board from NVMe
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ib4b85db667c27d266d2ed5a4aa4f4dffa3dd527e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38286
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 48ad36edb2..afe73c8763 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -19,7 +19,9 @@ /* Pad configuration in ramstage*/ static const struct pad_config gpio_table[] = { - /* ToDo: Fill gpio configuration */ + /* PCH M.2 SSD */ + PAD_CFG_GPO(GPP_B16, 1, PLTRST), + PAD_CFG_GPO(GPP_H0, 1, PLTRST), }; /* Early pad configuration in bootblock */ |