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authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2018-04-03 13:17:42 -0700
committerMartin Roth <martinroth@google.com>2018-04-05 15:57:03 +0000
commit8e1f563cd623585fae5cdee7132218d15374058c (patch)
treede1140507a6b0b693f746e5e450b8eb85ba6e394
parenta12c6019b5221e52c8600410d83a55f596cc89a9 (diff)
downloadcoreboot-8e1f563cd623585fae5cdee7132218d15374058c.tar.xz
mb/amd/gardenia/gpio.c: Convert GPIO to new format
New macros were developed that replace previous way of defining GPIO, with pin and intention very clear while keeping the table mostly identical to previous method (there's no pull up or pull down when a GPIO is set as an output). Change current gardenia table to use the new macros. BUG=b:72875858 TEST=Build Gardenia. Change-Id: I402b95374cc5ba01bb961ebcb34d8e465b443c08 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/25512 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
-rw-r--r--src/mainboard/amd/gardenia/gpio.c26
-rw-r--r--src/soc/amd/stoneyridge/include/soc/gpio.h5
2 files changed, 18 insertions, 13 deletions
diff --git a/src/mainboard/amd/gardenia/gpio.c b/src/mainboard/amd/gardenia/gpio.c
index c274a76bc6..cb10e74a62 100644
--- a/src/mainboard/amd/gardenia/gpio.c
+++ b/src/mainboard/amd/gardenia/gpio.c
@@ -28,34 +28,34 @@
*/
const struct soc_amd_stoneyridge_gpio gpio_set_stage_reset[] = {
/* NFC PU */
- {GPIO_64, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H },
+ PAD_GPO(GPIO_64, HIGH),
/* PCIe presence detect */
- {GPIO_69, Function0, FCH_GPIO_PULL_UP_ENABLE | INPUT },
+ PAD_GPI(GPIO_69, PULL_UP),
/* MUX for Power Express Eval */
- {GPIO_116, Function1, FCH_GPIO_PULL_DOWN_ENABLE | INPUT },
+ PAD_GPI(GPIO_116, PULL_DOWN),
/* SD power */
- {GPIO_119, Function2, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H },
+ PAD_GPO(GPIO_119, HIGH),
/* GPIO_136 - UART0_FCH_RX_DEBUG_RX */
- {GPIO_136, Function0, INPUT },
+ PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
/* GPIO_137 - UART0_FCH_DEBUG_RTS */
- {GPIO_137, Function0, INPUT },
+ PAD_NF(GPIO_137, UART0_RTS_L, PULL_NONE),
/* GPIO_138 - UART0_FCH_TX_DEBUG_RX */
- {GPIO_138, Function0, INPUT },
+ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
/* GPIO_142 - UART1_FCH_RTS */
- {GPIO_142, Function0, INPUT },
+ PAD_NF(GPIO_142, UART1_RTS_L, PULL_NONE),
/* GPIO_143 - UART1_FCH_TX */
- {GPIO_143, Function0, INPUT },
+ PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
};
const struct soc_amd_stoneyridge_gpio gpio_set_stage_ram[] = {
/* BT radio disable */
- {GPIO_14, Function1, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H },
+ PAD_GPO(GPIO_14, HIGH),
/* NFC wake */
- {GPIO_65, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H },
+ PAD_GPO(GPIO_65, HIGH),
/* Webcam */
- {GPIO_66, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H },
+ PAD_GPO(GPIO_66, HIGH),
/* GPS sleep */
- {GPIO_70, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H },
+ PAD_GPO(GPIO_70, HIGH),
};
const struct soc_amd_stoneyridge_gpio *early_gpio_table(size_t *size)
diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h
index 0f7ec1b683..2c3555b8ea 100644
--- a/src/soc/amd/stoneyridge/include/soc/gpio.h
+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h
@@ -223,8 +223,13 @@
#define GPIO_40_IOMUX_GPIOxx 0
#define GPIO_42_IOMUX_S5_MUX_CTRL 0
#define GPIO_42_IOMUX_GPIOxx 1
+#define GPIO_64_IOMUX_GPIOxx 0
+#define GPIO_65_IOMUX_GPIOxx 0
+#define GPIO_66_IOMUX_GPIOxx 0
#define GPIO_67_IOMUX_GPIOxx 0
#define GPIO_67_IOMUX_DEVSLP0 1
+#define GPIO_69_IOMUX_GPIOxx 0
+#define GPIO_69_IOMUX_SGPIO_LOAD 1
#define GPIO_70_IOMUX_GPIOxx 0
#define GPIO_70_IOMUX_DEVSLP1 1
#define GPIO_74_IOMUX_LPCCLK0 0