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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2016-06-10 19:35:15 +0200
committerMartin Roth <martinroth@google.com>2016-06-12 12:40:51 +0200
commita9067c6ec0b4a197d6eaa7ef3ab24c7b9e1e3826 (patch)
tree9608d39a91bb7418bf0646f6a97fd8d2f32a1513
parent4ac82401a84d29e7849a9eaa9431cc2754f1f18b (diff)
downloadcoreboot-a9067c6ec0b4a197d6eaa7ef3ab24c7b9e1e3826.tar.xz
arch/riscv: copy read/write8/16/32 from x86
Change-Id: I12de8f82499074f0fbbc1c09210b00c6a9614c1b Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/15146 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/arch/riscv/include/arch/io.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/arch/riscv/include/arch/io.h b/src/arch/riscv/include/arch/io.h
index 804d7dc1b1..5bc10c0cd4 100644
--- a/src/arch/riscv/include/arch/io.h
+++ b/src/arch/riscv/include/arch/io.h
@@ -45,4 +45,34 @@ static inline uint32_t inl(uint16_t port)
return 0;
}
+static inline __attribute__((always_inline)) uint8_t read8(const volatile void *addr)
+{
+ return *((volatile uint8_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint16_t read16(const volatile void *addr)
+{
+ return *((volatile uint16_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint32_t read32(const volatile void *addr)
+{
+ return *((volatile uint32_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) void write8(volatile void *addr, uint8_t value)
+{
+ *((volatile uint8_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write16(volatile void *addr, uint16_t value)
+{
+ *((volatile uint16_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write32(volatile void *addr, uint32_t value)
+{
+ *((volatile uint32_t *)(addr)) = value;
+}
+
#endif