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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-03-31 15:08:35 +1100
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-02 01:07:57 +0200
commitade70a0482fa4ed36d8d2d75f190876ccd7cbad5 (patch)
tree18a1dd1485d99e65118b44fe6696cb559fffd2f8
parentfbdc3ef7d9df3b68efafffa1c2d50352d25dfb60 (diff)
downloadcoreboot-ade70a0482fa4ed36d8d2d75f190876ccd7cbad5.tar.xz
superio/fintek/f71863fg: Avoid .c includes
Following the same reasoning as commit d304331 superio/fintek/f81865f: Avoid .c includes Clean up the early_serial #include directives in mainboard/romstage code. Change-Id: I863c16634873224c17e43100271e9b91419724d0 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5435 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c2
-rw-r--r--src/superio/fintek/f71863fg/Makefile.inc2
-rw-r--r--src/superio/fintek/f71863fg/chip.h2
-rw-r--r--src/superio/fintek/f71863fg/early_serial.c3
-rw-r--r--src/superio/fintek/f71863fg/f71863fg.h4
5 files changed, 8 insertions, 5 deletions
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index b8fa48e0ad..c082a67646 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -42,7 +42,7 @@
#include "northbridge/amd/amdfam10/reset_test.c"
#include <console/loglevel.h>
#include "cpu/x86/bist.h"
-#include "superio/fintek/f71863fg/early_serial.c"
+#include <superio/fintek/f71863fg/f71863fg.h>
#include <cpu/amd/mtrr.h>
#include "northbridge/amd/amdfam10/setup_resource_map.c"
#include "southbridge/amd/rs780/early_setup.c"
diff --git a/src/superio/fintek/f71863fg/Makefile.inc b/src/superio/fintek/f71863fg/Makefile.inc
index 0deb77e9d3..85ec530ccb 100644
--- a/src/superio/fintek/f71863fg/Makefile.inc
+++ b/src/superio/fintek/f71863fg/Makefile.inc
@@ -18,5 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+romstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += early_serial.c
ramstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += superio.c
-
diff --git a/src/superio/fintek/f71863fg/chip.h b/src/superio/fintek/f71863fg/chip.h
index 908482447b..4d2652e0d3 100644
--- a/src/superio/fintek/f71863fg/chip.h
+++ b/src/superio/fintek/f71863fg/chip.h
@@ -29,4 +29,4 @@ struct superio_fintek_f71863fg_config {
struct pc_keyboard keyboard;
};
-#endif
+#endif /* SUPERIO_FINTEK_F71863FG_CHIP_H */
diff --git a/src/superio/fintek/f71863fg/early_serial.c b/src/superio/fintek/f71863fg/early_serial.c
index 5d1cfb715e..251f298c19 100644
--- a/src/superio/fintek/f71863fg/early_serial.c
+++ b/src/superio/fintek/f71863fg/early_serial.c
@@ -21,6 +21,7 @@
/* Pre-RAM driver for the Fintek F71863FG Super I/O chip. */
#include <arch/io.h>
+#include <device/pnp.h>
#include "f71863fg.h"
static void pnp_enter_conf_state(device_t dev)
@@ -36,7 +37,7 @@ static void pnp_exit_conf_state(device_t dev)
outb(0xaa, port);
}
-static void f71863fg_enable_serial(device_t dev, u16 iobase)
+void f71863fg_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/fintek/f71863fg/f71863fg.h b/src/superio/fintek/f71863fg/f71863fg.h
index 5f11879701..127a120ba7 100644
--- a/src/superio/fintek/f71863fg/f71863fg.h
+++ b/src/superio/fintek/f71863fg/f71863fg.h
@@ -33,4 +33,6 @@
#define F71863FG_SPI 0x08 /* SPI */
#define F71863FG_PME 0x0a /* Power Management Events (PME) and ACPI */
-#endif
+void f71863fg_enable_serial(device_t dev, u16 iobase);
+
+#endif /* SUPERIO_FINTEK_F71863FG_F71863FG_H */