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authorFurquan Shaikh <furquan@chromium.org>2017-05-01 23:36:00 -0700
committerFurquan Shaikh <furquan@google.com>2017-05-04 18:58:23 +0200
commitbfcc1e37b978990f6a269127004ddd2390c2c7d1 (patch)
tree20ac586b2e485f320a2a47f81d0cf4ee5399a5ff
parent91fbb25ec77ea437e611415d3eb91d3ac7a6998c (diff)
downloadcoreboot-bfcc1e37b978990f6a269127004ddd2390c2c7d1.tar.xz
soc/intel/skylake: Remove unused skylake_i2c_config structure
Remove struct skylake_i2c_config from chip.h since it is not used anymore. Change-Id: Icde4b7af5b9c31020099c1a6372a6867827f61ae Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19520 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
-rw-r--r--src/soc/intel/skylake/chip.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index cd461d4430..b474ca22a1 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -40,15 +40,6 @@ enum skylake_i2c_voltage {
I2C_VOLTAGE_1V8
};
-struct skylake_i2c_config {
- /* Bus speed in Hz, default is I2C_SPEED_FAST (400 KHz) */
- enum i2c_speed speed;
- /* Bus should be enabled prior to ramstage with temporary base */
- int early_init;
- /* Custom bus speed configuration { scl_lcnt, scl_hcnt, sda_hold } */
- struct lpss_i2c_speed_config speed_config[LPSS_I2C_SPEED_CONFIG_COUNT];
-};
-
struct soc_intel_skylake_config {
/*
* Interrupt Routing configuration