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authorTimothy Pearson <tpearson@raptorengineering.com>2017-01-09 13:19:29 -0600
committerTimothy Pearson <tpearson@raptorengineering.com>2017-01-10 21:07:28 +0100
commitcf1cb5b2d4f528e7eab55ee9393cf72016bac888 (patch)
tree84ec9b93cd7324a13aba2a7d078f860f454ae58b
parentaeaabd3fa36950756f1cb818882ccafe8ff2c1f5 (diff)
downloadcoreboot-cf1cb5b2d4f528e7eab55ee9393cf72016bac888.tar.xz
amd/mct/ddr3: Correctly configure CsMux45
The existing logic to set up CsMux45 used an incorrect mask and comparison value due to a copy + paste editing error. Use the correct mask and comparison value for the last two values. Found-by: Coverity Scan #1347385 Change-Id: Ic08a52977df90b9952e434e71cd12dbc6d7e1443 Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-on: https://review.coreboot.org/18070 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctproc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
index 07bde27d37..48658f58e5 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
@@ -43,7 +43,7 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
if ((((f2x80 & 0xf) == 0x7) || ((f2x80 & 0xf) == 0x9))
&& ((f2x60 & 0x3) == 0x3))
cs_mux_45 = 1;
- else if ((((f2x80 & 0xa) == 0x7) || ((f2x80 & 0xb) == 0x9))
+ else if ((((f2x80 & 0xf) == 0xa) || ((f2x80 & 0xf) == 0xb))
&& ((f2x60 & 0x3) > 0x1))
cs_mux_45 = 1;
else