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authorJagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>2016-07-11 00:45:10 -0700
committerAaron Durbin <adurbin@chromium.org>2016-07-13 19:58:12 +0200
commitd41a338d55ec97bd5c9aa92ecb7dc163ff83dcd2 (patch)
tree324c6d938c3a38a013a2594178a52623a4778fd3
parentb6fc727903775b6a100d8cf02cb53ac22fae49d9 (diff)
downloadcoreboot-d41a338d55ec97bd5c9aa92ecb7dc163ff83dcd2.tar.xz
intel/amenia: Disable unused PCIe ports
Disable PCIe A0, A1, A2, A3, B1 ports. Enable B0 port which is used for wifi. BUG=chrome-os-partner:54288 BRANCH=None TEST=lspci should show only PCIe B0 device Change-Id: I266d6eb7ddd56888f6b07b59681c2d9f0a6c0a9e Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Reviewed-on: https://review.coreboot.org/15599 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/mainboard/intel/amenia/devicetree.cb11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/mainboard/intel/amenia/devicetree.cb b/src/mainboard/intel/amenia/devicetree.cb
index 3b25b2b00a..dc6182c157 100644
--- a/src/mainboard/intel/amenia/devicetree.cb
+++ b/src/mainboard/intel/amenia/devicetree.cb
@@ -40,11 +40,12 @@ chip soc/intel/apollolake
device pci 0e.0 on end # - Audio
device pci 11.0 on end # - ISH
device pci 12.0 on end # - SATA
- device pci 13.0 on end # - PCIe-A 0
- device pci 13.2 on end # - Onboard Lan
- device pci 13.3 on end # - PCIe-A 3
- device pci 14.0 on end # - PCIe-B 0
- device pci 14.1 on end # - Onboard M2 Slot(Wifi/BT)
+ device pci 13.0 off end # - PCIe-A 0
+ device pci 13.1 off end # - PCIe-A 1
+ device pci 13.2 off end # - PCIe-A 2 - Onboard Lan
+ device pci 13.3 off end # - PCIe-A 3
+ device pci 14.0 on end # - PCIe-B 0 - wifi
+ device pci 14.1 off end # - PCIe-B 1 - Onboard M2 Slot(Wifi/BT)
device pci 15.0 on end # - XHCI
device pci 15.1 off end # - XDCI
device pci 16.0 on end # - I2C 0