arch/x86/car.ld: Rename suffix _start/_end

This is more in line with how linker symbol for regions are defined.

Change-Id: I0bd7ae59a27909ed0fd38e6f7193816cb57e76af
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36695
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

13 files changed, 23 insertions, 23 deletions

diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S
index c36dc1cb10..d9d6d4ecef 100644
--- a/src/arch/x86/assembly_entry.S
+++ b/src/arch/x86/assembly_entry.S
@@ -30,7 +30,7 @@ _start:
 	call	gdt_init
 
 	/* reset stack pointer to CAR stack */
-	mov	$_car_stack_end, %esp
+	mov	$_ecar_stack, %esp
 
 	/* clear .bss section as it is not shared */
 	cld
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 6ccbd8c236..74fc74b58e 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -37,9 +37,9 @@
 	 * use CAR it can be reused. The chipset/SoC is expected to provide
 	 * the stack size. */
 #if CONFIG(C_ENVIRONMENT_BOOTBLOCK)
-	_car_stack_start = .;
+	_car_stack = .;
 	. += CONFIG_DCACHE_BSP_STACK_SIZE;
-	_car_stack_end = .;
+	_ecar_stack = .;
 #endif
 	/* The pre-ram cbmem console as well as the timestamp region are fixed
 	 * in size. Therefore place them above the car global section so that
@@ -59,10 +59,10 @@
 
 	TIMESTAMP(., 0x200)
 
-	_car_ehci_dbg_info_start = .;
+	_car_ehci_dbg_info = .;
 	/* Reserve sizeof(struct ehci_dbg_info). */
         . += 80;
-        _car_ehci_dbg_info_end = .;
+        _ecar_ehci_dbg_info = .;
 
 	/* _bss and _ebss provide symbols to per-stage
 	 * variables that are not shared like the timestamp and the pre-ram
@@ -87,8 +87,8 @@
 	_car_unallocated_start = .;
 
 #if !CONFIG(C_ENVIRONMENT_BOOTBLOCK)
-	_car_stack_start = .;
-	_car_stack_end = _car_region_end;
+	_car_stack = .;
+	_ecar_stack = _car_region_end;
 #endif
 	_car_region_end = . + CONFIG_DCACHE_RAM_SIZE - (. - _car_region_start);
 }
diff --git a/src/arch/x86/include/arch/symbols.h b/src/arch/x86/include/arch/symbols.h
index f715e0a6d1..efe10fe524 100644
--- a/src/arch/x86/include/arch/symbols.h
+++ b/src/arch/x86/include/arch/symbols.h
@@ -27,15 +27,15 @@ extern char _car_region_end[];
  * This is the stack area used for all stages that execute when cache-as-ram
  * is up. Area is not cleared in between stages.
  */
-extern char _car_stack_start[];
-extern char _car_stack_end[];
-#define _car_stack_size (_car_stack_end - _car_stack_start)
+extern char _car_stack[];
+extern char _ecar_stack[];
+#define _car_stack_size (_ecar_stack - _car_stack)
 
 extern char _car_unallocated_start[];
 
-extern char _car_ehci_dbg_info_start[];
-extern char _car_ehci_dbg_info_end[];
+extern char _car_ehci_dbg_info[];
+extern char _ecar_ehci_dbg_info[];
 #define _car_ehci_dbg_info_size \
-	(_car_ehci_dbg_info_end - _car_ehci_dbg_info_start)
+	(_ecar_ehci_dbg_info - _car_ehci_dbg_info)
 
 #endif
diff --git a/src/cpu/intel/car/core2/cache_as_ram.S b/src/cpu/intel/car/core2/cache_as_ram.S
index a1bec12ede..0e0fa77bb0 100644
--- a/src/cpu/intel/car/core2/cache_as_ram.S
+++ b/src/cpu/intel/car/core2/cache_as_ram.S
@@ -173,7 +173,7 @@ addrsize_set_high:
 	movl	%eax, %cr0
 
 	/* Setup the stack. */
-	mov	$_car_stack_end, %esp
+	mov	$_ecar_stack, %esp
 
 	/* Need to align stack to 16 bytes at call instruction. Account for
 	the pushes below. */
diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S
index 08ad195964..cd6972062c 100644
--- a/src/cpu/intel/car/non-evict/cache_as_ram.S
+++ b/src/cpu/intel/car/non-evict/cache_as_ram.S
@@ -215,7 +215,7 @@ end_microcode_update:
 	movl	%eax, %cr0
 
 	/* Setup the stack. */
-	mov	$_car_stack_end, %esp
+	mov	$_ecar_stack, %esp
 
 	/* Need to align stack to 16 bytes at call instruction. Account for
 	the pushes below. */
diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S
index 33f0bfd2a3..a3487dbe34 100644
--- a/src/cpu/intel/car/p3/cache_as_ram.S
+++ b/src/cpu/intel/car/p3/cache_as_ram.S
@@ -161,7 +161,7 @@ addrsize_set_high:
 	movl	%eax, %cr0
 
 	/* Setup the stack. */
-	mov	$_car_stack_end, %esp
+	mov	$_ecar_stack, %esp
 
 	/* Need to align stack to 16 bytes at call instruction. Account for
 	the pushes below. */
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
index 58e411dcc3..7815eb3235 100644
--- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S
+++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
@@ -376,7 +376,7 @@ fill_cache:
 	rep	stosl
 
 	/* Setup the stack. */
-	mov	$_car_stack_end, %esp
+	mov	$_ecar_stack, %esp
 
 	/* Need to align stack to 16 bytes at call instruction. Account for
 	the pushes below. */
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index 547b1211df..1525233e39 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -46,7 +46,7 @@ static void romstage_main(unsigned long bist)
 		printk(BIOS_DEBUG, "Romstage stack size limited to 0x%x!\n",
 			size);
 
-	stack_base = (u32 *) (_car_stack_end - size);
+	stack_base = (u32 *) (_ecar_stack - size);
 
 	for (i = 0; i < num_guards; i++)
 		stack_base[i] = stack_guard;
diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
index f5678a1807..1fa0018dc8 100644
--- a/src/cpu/qemu-x86/cache_as_ram_bootblock.S
+++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
@@ -34,7 +34,7 @@ cache_as_ram:
 
 	post_code(0x21)
 
-	movl	$_car_stack_end, %esp
+	movl	$_ecar_stack, %esp
 
 	/* Align the stack and keep aligned for call to bootblock_c_entry() */
 	and	$0xfffffff0, %esp
diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c
index ff237265eb..398f5db321 100644
--- a/src/drivers/usb/ehci_debug.c
+++ b/src/drivers/usb/ehci_debug.c
@@ -70,7 +70,7 @@ static inline struct ehci_debug_info *dbgp_ehci_info(void)
 			/* The message likely does not show if we hit this. */
 			if (sizeof(*info) > _car_ehci_dbg_info_size)
 				die("BUG: Increase ehci_dbg_info reserve in CAR");
-			info = (void *)_car_ehci_dbg_info_start;
+			info = (void *)_car_ehci_dbg_info;
 		} else {
 			info = &glob_dbg_info;
 		}
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
index d5f5081c3c..471c18e407 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
@@ -170,7 +170,7 @@ car_init_done:
 	post_code(0x29)
 
 	/* Setup bootblock stack */
-	mov	$_car_stack_end, %esp
+	mov	$_ecar_stack, %esp
 
 	/* Need to align stack to 16 bytes at call instruction. Account for
 	   the two pushes below. */
diff --git a/src/soc/intel/quark/bootblock/esram_init.S b/src/soc/intel/quark/bootblock/esram_init.S
index 13a4d63d3c..ca96ceb6e4 100644
--- a/src/soc/intel/quark/bootblock/esram_init.S
+++ b/src/soc/intel/quark/bootblock/esram_init.S
@@ -502,7 +502,7 @@ L44:
 	*/
 
 	/* Setup bootblock stack */
-	movl	$_car_stack_end, %esp
+	movl	$_ecar_stack, %esp
 
 before_carstage:
 	post_code(0x2b)
diff --git a/src/soc/intel/quark/romstage/fsp_params.c b/src/soc/intel/quark/romstage/fsp_params.c
index cd654d74de..681e126a13 100644
--- a/src/soc/intel/quark/romstage/fsp_params.c
+++ b/src/soc/intel/quark/romstage/fsp_params.c
@@ -118,7 +118,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
 			_car_unallocated_start);
 		printk(BIOS_SPEW, "| coreboot data     |\n");
 		printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
-			_car_stack_end);
+			_ecar_stack);
 		printk(BIOS_SPEW, "| coreboot stack    |\n");
 		printk(BIOS_SPEW,
 			"+-------------------+ 0x80000000 - ESRAM start\n\n");