diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2012-12-12 12:32:43 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-14 18:27:33 +0100 |
| commit | ef8f4c78a55bc8c2874b02177e0612c8bffb5e39 (patch) | |
| tree | edfa7c4d9bb604c9b949d7eec96ee15623bf1e4e | |
| parent | e265d209374812f103fa401be518db624b79520d (diff) | |
| download | coreboot-ef8f4c78a55bc8c2874b02177e0612c8bffb5e39.tar.xz | |
baskingridge: zero out alt_gp_smi_en in devicetree
The baskingridge has a non-zero alt_gp_smi_en value in the
devicetree.cb file. It has just to be determined which GPI
pins should trigger an SMI on basking ridge. Without this change
the board would hang during boot (presumably through a SMI flood).
No more hangs once the value is zero.
Change-Id: I9704071bb7966bd3d0bbbc4aafede3f42d829b17
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2673
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| -rw-r--r-- | src/mainboard/intel/baskingridge/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb index 737de1cfb6..c74767a74f 100644 --- a/src/mainboard/intel/baskingridge/devicetree.cb +++ b/src/mainboard/intel/baskingridge/devicetree.cb @@ -47,7 +47,7 @@ chip northbridge/intel/haswell # 2 SCI (if corresponding GPIO_EN bit is also set) register "gpi1_routing" = "1" register "gpi14_routing" = "2" - register "alt_gp_smi_en" = "0x0002" + register "alt_gp_smi_en" = "0x0000" register "gpe0_en" = "0x4000" register "ide_legacy_combined" = "0x0" |