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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-11-25 17:53:29 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-12-11 11:40:34 +0000
commitfd6fb289ce294b3468c7770b697e78932e281b09 (patch)
treee4a2e3fc8f1a907a48164ac3e10be730e7514726
parente4951055dd96be64d46c3d73a6dc4fa3a8260a5b (diff)
downloadcoreboot-fd6fb289ce294b3468c7770b697e78932e281b09.tar.xz
vc/amd/pi: Allow 00670F00 to build with no binaryPI
Make the default binaryPI image strings for all stoneyridge-based APUs depend on USE_AMD_BLOBS. Ensure the build completes without names, and without images. Change-Id: I74a38efa2a4ad2f9f12a1f8e7fb8694d0ab9dd1e Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37228 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
-rw-r--r--src/vendorcode/amd/pi/00670F00/Makefile.inc23
-rw-r--r--src/vendorcode/amd/pi/Kconfig12
2 files changed, 28 insertions, 7 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/Makefile.inc b/src/vendorcode/amd/pi/00670F00/Makefile.inc
index fef7dff342..947134f1d9 100644
--- a/src/vendorcode/amd/pi/00670F00/Makefile.inc
+++ b/src/vendorcode/amd/pi/00670F00/Makefile.inc
@@ -116,10 +116,22 @@ ramstage-libs += $(agesa_output_path)/libagesa.a
#######################################################################
+warn_no_agesa:
+ printf "\n\t** WARNING **\n"
+ printf "coreboot has been built with no AGESA support. Successfully "
+ printf "booting this image will be impossible.\n\n"
+
+PHONY+=warn_no_amdfw
+
ifeq ($(CONFIG_AGESA_SPLIT_MEMORY_FILES), y)
# convert input elf to rmodule
AGESA_POST_MEM_INPUT_ELF = $(call strip_quotes,$(CONFIG_AGESA_POST_MEMORY_BINARY_PI_FILE))
+
+# If no post-mem file then also skip pre-mem file
+ifeq ($(AGESA_POST_MEM_INPUT_ELF,))
+files_added:: warn_no_agesa
+else
AGESA_POST_MEM_ELF = $(objcbfs)/$(patsubst %.elf,%.debug,$(notdir $(AGESA_POST_MEM_INPUT_ELF)))
AGESA_POST_MEM_ELF_RMOD = $(AGESA_POST_MEM_ELF).rmod
@@ -140,10 +152,18 @@ cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_POST_MEMORY_CBFS_
$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-file := $(AGESA_POST_MEM_ELF_RMOD)
$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-type := stage
$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-compression := $(CBFS_COMPRESS_FLAG)
+
+endif # AGESA_POST_MEM_INPUT_ELF == ""
+
+else # CONFIG_AGESA_SPLIT_MEMORY_FILES
+
+AGESA_BINARYPI_INPUT_FILE = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_FILE))
+ifeq ($(AGESA_BINARYPI_INPUT_FILE),)
+files_added:: warn_no_agesa
else
cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_CBFS_NAME)
-$(CONFIG_AGESA_CBFS_NAME)-file := $(CONFIG_AGESA_BINARY_PI_FILE)
+$(CONFIG_AGESA_CBFS_NAME)-file := $(AGESA_BINARYPI_INPUT_FILE)
ifeq ($(CONFIG_AGESA_BINARY_PI_AS_STAGE),y)
$(CONFIG_AGESA_CBFS_NAME)-type := stage
@@ -156,6 +176,7 @@ $(CONFIG_AGESA_CBFS_NAME)-type := raw
$(CONFIG_AGESA_CBFS_NAME)-position := $(CONFIG_AGESA_BINARY_PI_LOCATION)
endif # CONFIG_AGESA_BINARY_PI_AS_STAGE
+endif # AGESA_BINARYPI_INPUT_FILE == ""
endif # CONFIG_AGESA_SPLIT_MEMORY_FILES
endif
diff --git a/src/vendorcode/amd/pi/Kconfig b/src/vendorcode/amd/pi/Kconfig
index 06055639fb..73fe4f2f10 100644
--- a/src/vendorcode/amd/pi/Kconfig
+++ b/src/vendorcode/amd/pi/Kconfig
@@ -44,10 +44,10 @@ config AGESA_BINARY_PI_FILE
string "AGESA PI binary file name"
default "3rdparty/blobs/pi/amd/00630F01/FP3/AGESA.bin" if CPU_AMD_PI_00630F01
default "3rdparty/blobs/pi/amd/00730F01/FT3b/AGESA.bin" if CPU_AMD_PI_00730F01
- default "3rdparty/blobs/pi/amd/merlinfalcon/$(CONFIG_AMD_SOC_PACKAGE)/AGESA_CZ_FP4.bin" if SOC_AMD_MERLINFALCON && HAVE_MERLINFALCON_BINARIES
- default "3rdparty/blobs/pi/amd/00670F00/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if SOC_AMD_MERLINFALCON && !HAVE_MERLINFALCON_BINARIES
- default "3rdparty/blobs/pi/amd/00670F00/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if SOC_AMD_STONEYRIDGE_FP4
- default "3rdparty/blobs/pi/amd/00670F00/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if SOC_AMD_STONEYRIDGE_FT4
+ default "3rdparty/blobs/pi/amd/merlinfalcon/$(CONFIG_AMD_SOC_PACKAGE)/AGESA_CZ_FP4.bin" if SOC_AMD_MERLINFALCON && HAVE_MERLINFALCON_BINARIES && USE_AMD_BLOBS
+ default "3rdparty/blobs/pi/amd/00670F00/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if SOC_AMD_MERLINFALCON && !HAVE_MERLINFALCON_BINARIES && USE_AMD_BLOBS
+ default "3rdparty/blobs/pi/amd/00670F00/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if SOC_AMD_STONEYRIDGE_FP4 && USE_AMD_BLOBS
+ default "3rdparty/blobs/pi/amd/00670F00/$(CONFIG_AMD_SOC_PACKAGE)/AGESA.bin" if SOC_AMD_STONEYRIDGE_FT4 && USE_AMD_BLOBS
default "3rdparty/blobs/pi/amd/00660F01/FP4/AGESA.bin" if CPU_AMD_PI_00660F01
help
Specify the binary file to use for AMD platform initialization.
@@ -72,7 +72,7 @@ config AGESA_SPLIT_MEMORY_FILES
config AGESA_PRE_MEMORY_BINARY_PI_FILE
string
depends on AGESA_SPLIT_MEMORY_FILES
- default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_premem.elf" if SOC_AMD_STONEYRIDGE_FT4
+ default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_premem.elf" if SOC_AMD_STONEYRIDGE_FT4 && USE_AMD_BLOBS
help
Specify the binary file to use for pre-memory AMD platform
initialization.
@@ -80,7 +80,7 @@ config AGESA_PRE_MEMORY_BINARY_PI_FILE
config AGESA_POST_MEMORY_BINARY_PI_FILE
string
depends on AGESA_SPLIT_MEMORY_FILES
- default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_postmem.elf" if SOC_AMD_STONEYRIDGE_FT4
+ default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA_postmem.elf" if SOC_AMD_STONEYRIDGE_FT4 && USE_AMD_BLOBS
help
Specify the binary file to use for post-memory AMD platform
initialization.