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authorUwe Hermann <uwe@hermann-uwe.de>2009-06-01 01:38:29 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2009-06-01 01:38:29 +0000
commitfff87d31ca480a99f262bedab349f93f0b11d3a1 (patch)
treefc79d47a7af5abe349e97447ab2a5bd7ea2de1a6
parenta519fe77b60123f1fba46f1f93580d5628a88555 (diff)
downloadcoreboot-fff87d31ca480a99f262bedab349f93f0b11d3a1.tar.xz
Cosmetics and consistency fixes in src/superio/serverengines/pilot/ (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4328 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/superio/serverengines/pilot/pilot.h19
-rw-r--r--src/superio/serverengines/pilot/pilot_early_init.c59
-rw-r--r--src/superio/serverengines/pilot/pilot_early_serial.c13
3 files changed, 43 insertions, 48 deletions
diff --git a/src/superio/serverengines/pilot/pilot.h b/src/superio/serverengines/pilot/pilot.h
index 907cf66b1a..de75a94276 100644
--- a/src/superio/serverengines/pilot/pilot.h
+++ b/src/superio/serverengines/pilot/pilot.h
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2009 University of Heidelberg
- * Written by Mondrian Nuessle <nuessle@uni-heidelberg.de> for University of Heidelberg
+ * Written by Mondrian Nuessle <nuessle@uni-heidelberg.de> for Univ. Heidelberg
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,15 +19,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* PILOT SuperIO is only based on LPC observation done on factory system. */
+/* PILOT Super I/O is only based on LPC observation done on factory system. */
-#define PILOT_SP1 0x02
-// Serial port COM1
-#define PILOT_LD1 0x01
-// logical device 1
-#define PILOT_LD4 0x04
-// logical device 4
-#define PILOT_LD5 0x05
-// logical device 5
-#define PILOT_LD7 0x07
-// logical device 7
+#define PILOT_SP1 0x02 /* Com1 */
+#define PILOT_LD1 0x01 /* Logical device 1 */
+#define PILOT_LD4 0x04 /* Logical device 4 */
+#define PILOT_LD5 0x05 /* Logical device 5 */
+#define PILOT_LD7 0x07 /* Logical device 7 */
diff --git a/src/superio/serverengines/pilot/pilot_early_init.c b/src/superio/serverengines/pilot/pilot_early_init.c
index 0bd83c96ec..b5013ef306 100644
--- a/src/superio/serverengines/pilot/pilot_early_init.c
+++ b/src/superio/serverengines/pilot/pilot_early_init.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2009 University of Heidelberg
- * Written by Mondrian Nuessle <nuessle@uni-heidelberg.de> for University of Heidelberg
+ * Written by Mondrian Nuessle <nuessle@uni-heidelberg.de> for Univ. Heidelberg
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,78 +19,79 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* PILOT SuperIO is only based on LPC observation done on factory system. */
+/* PILOT Super I/O is only based on LPC observation done on factory system. */
#define BLUBB_DEV PNP_DEV(port, 0x04)
-/* Logical device 4, 5 and 7 are being deactivated. Logical Device 1 seems to
- be another serial (?), it is also deactivated on the HP machine */
+/*
+ * Logical device 4, 5 and 7 are being deactivated. Logical Device 1 seems to
+ * be another serial (?), it is also deactivated on the HP machine.
+ */
static void pilot_early_init(device_t dev)
{
- unsigned port = dev>>8;
- print_debug("Using port:");print_debug_hex16(port);print_debug("\r\n");
- pilot_disable_serial(PNP_DEV(port,0x1));
+ unsigned port = dev >> 8;
+
+ print_debug("Using port: ");
+ print_debug_hex16(port);
+ print_debug("\r\n");
+ pilot_disable_serial(PNP_DEV(port, 0x1));
print_debug("disable serial 1\r\n");
/*
-pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x3));
+ pnp_enter_ext_func_mode(dev);
+ pnp_set_logical_device(PNP_DEV(port, 0x3));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable( PNP_DEV(port,0x3),0);
+ pnp_set_enable(PNP_DEV(port, 0x3), 0);
pnp_exit_ext_func_mode(dev);
*/
pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x4));
+ pnp_set_logical_device(PNP_DEV(port, 0x4));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable( PNP_DEV(port,0x4),0);
+ pnp_set_enable( PNP_DEV(port, 0x4), 0);
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x5));
+ pnp_set_logical_device(PNP_DEV(port, 0x5));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable(PNP_DEV(port,0x5),0);
+ pnp_set_enable(PNP_DEV(port, 0x5), 0);
pnp_exit_ext_func_mode(dev);
- /*
+/*
pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x6));
+ pnp_set_logical_device(PNP_DEV(port, 0x6));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable( PNP_DEV(port,0x6),0);
+ pnp_set_enable( PNP_DEV(port, 0x6), 0);
pnp_exit_ext_func_mode(dev);
*/
pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x7));
+ pnp_set_logical_device(PNP_DEV(port, 0x7));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable(PNP_DEV(port,0x7), 0);
+ pnp_set_enable(PNP_DEV(port, 0x7), 0);
pnp_exit_ext_func_mode(dev);
/*
pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x8));
+ pnp_set_logical_device(PNP_DEV(port, 0x8));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable(PNP_DEV(port,0x8), 0);
+ pnp_set_enable(PNP_DEV(port, 0x8), 0);
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x9));
+ pnp_set_logical_device(PNP_DEV(port, 0x9));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable(PNP_DEV(port,0x9), 0);
+ pnp_set_enable(PNP_DEV(port, 0x9), 0);
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(PNP_DEV(port,0x10;
+ pnp_set_logical_device(PNP_DEV(port, 0x10));
pnp_exit_ext_func_mode(dev);
pnp_enter_ext_func_mode(dev);
- pnp_set_enable(PNP_DEV(port,0x10 0);
+ pnp_set_enable(PNP_DEV(port, 0x10), 0);
pnp_exit_ext_func_mode(dev);
*/
-
}
-
-
-
diff --git a/src/superio/serverengines/pilot/pilot_early_serial.c b/src/superio/serverengines/pilot/pilot_early_serial.c
index 934e8b113f..7890633cfd 100644
--- a/src/superio/serverengines/pilot/pilot_early_serial.c
+++ b/src/superio/serverengines/pilot/pilot_early_serial.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2009 University of Heidelberg
- * Written by Mondrian Nuessle <nuessle@uni-heidelberg.de> for University of Heidelberg
+ * Written by Mondrian Nuessle <nuessle@uni-heidelberg.de> for Univ. Heidelberg
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,25 +19,25 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* PILOT SuperIO is only based on LPC observation done on factory system. */
+/* PILOT Super I/O is only based on LPC observation done on factory system. */
#include <arch/romcc_io.h>
#include "pilot.h"
-/* pilot uses 0x5A/0xA5 pattern to actiavte deactivate config access */
+/* Pilot uses 0x5A/0xA5 pattern to actiavte deactivate config access. */
static inline void pnp_enter_ext_func_mode(device_t dev)
{
- unsigned port = dev>>8;
+ unsigned port = dev >> 8;
outb(0x5A, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
- unsigned port = dev>>8;
+ unsigned port = dev >> 8;
outb(0xA5, port);
}
-/* serial config is failry standard procedure */
+/* Serial config is a fairly standard procedure. */
static void pilot_enable_serial(device_t dev, unsigned iobase)
{
pnp_enter_ext_func_mode(dev);
@@ -55,4 +55,3 @@ static void pilot_disable_serial(device_t dev)
pnp_set_enable(dev, 0);
pnp_exit_ext_func_mode(dev);
}
-