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authorKane Chen <kane.chen@intel.com>2014-07-11 16:24:39 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-01-19 01:53:43 +0100
commit00aedc5e1aa4fc17b305958635763a4ff203b4b4 (patch)
tree61e3210f48a49b3fc20a39f195005d57925f2aec
parent2e3bdcf76e44cd9e3afe8d3e00285201bd18e40a (diff)
downloadcoreboot-00aedc5e1aa4fc17b305958635763a4ff203b4b4.tar.xz
samus: add acpi resource for supporting RT5677 codec
Add codec acpi resource for supporting RT5667 codec. BUG=chrome-os-partner:29649 TEST=emerge-coreboot successfully checked codec device is probed Original-Change-Id: I739c0dbfdbfa221b06f99c3d934825b640096c6b Original-Signed-off-by: Kane Chen <kane.chen@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/207707 Original-Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> (cherry picked from commit f9698c45a47efe7fd2a1f5432640f3db5e4bd3f0) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ib14b27421613d747e02037ecd2311d9966a5d813 Reviewed-on: http://review.coreboot.org/8212 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
-rw-r--r--src/mainboard/google/samus/acpi/mainboard.asl30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/mainboard/google/samus/acpi/mainboard.asl b/src/mainboard/google/samus/acpi/mainboard.asl
index eb668183b8..624aa3822b 100644
--- a/src/mainboard/google/samus/acpi/mainboard.asl
+++ b/src/mainboard/google/samus/acpi/mainboard.asl
@@ -117,6 +117,36 @@ Scope (\_SB.PCI0.I2C0)
}
}
}
+
+ Device (CODC)
+ {
+ /*
+ * TODO(kane): Need official HID.
+ *
+ */
+ Name (_HID, "RT5677CE")
+ Name (_DDN, "RT5667 Codec")
+ Name (_UID, 1)
+ Name (_CRS, ResourceTemplate()
+ {
+ I2cSerialBus (
+ 0x2c, // SlaveAddress
+ ControllerInitiated, // SlaveMode
+ 400000, // ConnectionSpeed
+ AddressingMode7Bit, // AddressingMode
+ "\\_SB.PCI0.I2C0", // ResourceSource
+ )
+ Interrupt (ResourceConsumer, Edge, ActiveLow){ 30 }
+ })
+ Method (_STA)
+ {
+ If (LEqual (\S1EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+ }
}
Scope (\_SB.PCI0.I2C1)