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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-19 15:55:01 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-23 22:08:41 +0200 |
| commit | 03c6ab5ea6c8191fd0e1dd03e38002946aaefc85 (patch) | |
| tree | 9255c190db713539b3c48256f5fb5aa522436a6c | |
| parent | c32a52c200f115cd910188cfd91438b11e58fcb1 (diff) | |
| download | coreboot-03c6ab5ea6c8191fd0e1dd03e38002946aaefc85.tar.xz | |
lippert/toucan-af: 64bit fixes
Change-Id: I9e7f78587b9d6e87cf77757654da9145d4187625
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10599
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
| -rw-r--r-- | src/mainboard/lippert/toucan-af/mainboard.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index d46fbc8b82..4afef231ea 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -93,7 +93,7 @@ static void init(struct device *dev) fch_gpio_state(58)<<2 | fch_gpio_state(57)<<1 | fch_gpio_state(56)); /* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */ - spi_base = (u8*)(pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0); + spi_base = (u8*)((uintptr_t)pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0); spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register /* Notify the SMC we're alive and kicking, or after a while it will |