diff options
author | V Sowmya <v.sowmya@intel.com> | 2017-07-18 12:08:13 +0530 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-07-27 00:31:31 +0000 |
commit | 0f307957b419a2099bb128f2cec35a16550e643e (patch) | |
tree | c601b39f57e61656eab6ae9507de4bfd70e0318d | |
parent | 58eb6346594c07ee470e94c3b00885d0c734d167 (diff) | |
download | coreboot-0f307957b419a2099bb128f2cec35a16550e643e.tar.xz |
mainboard/intel/kblrvp: Add MIPI camera support
This patch adds mipi_camera.asl and enables
I2C2, I2C3, CIO2 and IMGU devices,
* Add TPS68470 PMIC1 and PMIC2 related ACPI objects.
* Add OV cameras related ACPI objects.
* Add Dongwoon AF DAC related ACPI objects.
* SSDB: Sensor specific database for camera sensor.
* CAMD: ACPI object to specify the camera device type.
KBLRVP has two PMIC's sitting on I2C2 and I2C3. CAM0 and
CAM1 power requirements are handled by PMIC1 and PMIC2 respectively.
BUG=none
BRANCH=none
TEST=Build and boot kblrvp. Dump and verify that the generated DSDT table
has the required entries.
Change-Id: Ibaf26dad74ca1e7c9f415ae75c4ed8558ad99e2f
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/20661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r-- | src/mainboard/intel/kblrvp/acpi/mipi_camera.asl | 166 | ||||
-rw-r--r-- | src/mainboard/intel/kblrvp/dsdt.asl | 3 | ||||
-rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb | 10 |
3 files changed, 175 insertions, 4 deletions
diff --git a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl new file mode 100644 index 0000000000..3fefeb1b49 --- /dev/null +++ b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl @@ -0,0 +1,166 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (\_SB.PCI0.I2C2) +{ + Device (PMIC) + { + Name (_HID, "INT3472") /* _HID: Hardware ID */ + Name (_UID, Zero) // _UID: Unique ID */ + Name (_DDN, "TPS68470 PMIC") /* _DDN: DOS Device Name */ + Name (CAMD, 0x64) + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x004D, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C2", + 0x00, ResourceConsumer, , + ) + }) + } + + Device (CAM0) + { + Name (_HID, "OVTID858") /* _HID: Hardware ID */ + Name (_UID, Zero) /* _UID: Unique ID */ + Name (_DDN, "OV 13858 Camera") /* _DDN: DOS Device Name */ + Name (CAMD, 0x02) + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_DEP, Package() {\_SB.PCI0.I2C2.PMIC}) + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C2", + 0x00, ResourceConsumer, , + ) + }) + + Method (SSDB, 0, Serialized) + { + Return (Buffer (0x5E) + { + /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03, + /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36, + /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00 + }) + } + } + + Device (VCM0) + { + Name (_HID, "DWDWD000") /* _HID: Hardware ID */ + Name (_UID, Zero) /* _UID: Unique ID */ + Name (_DDN, "Dongwoon AF DAC") /* _DDN: DOS Device Name */ + Name (CAMD, 0x03) + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_DEP, Package() {\_SB.PCI0.I2C2.PMIC}) + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x000C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C2", + 0x00, ResourceConsumer, , + ) + }) + } +} + +Scope (\_SB.PCI0.I2C3) +{ + Device (PMIC) + { + Name (_HID, "INT3473") /* _HID: Hardware ID */ + Name (_UID, Zero) /* _UID: Unique ID */ + Name (_DDN, "TPS68470 PMIC 2") /* _DDN: DOS Device Name */ + Name (CAMD, 0x64) + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x0049, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + } + + Device (CAM1) + { + Name (_HID, "INT3479") /* _HID: Hardware ID */ + Name (_UID, Zero) /* _UID: Unique ID */ + Name (_DDN, "OV 5670 Camera") /* _DDN: DOS Device Name */ + Name (CAMD, 0x02) + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_DEP, Package() {\_SB.PCI0.I2C3.PMIC}) + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + + Method (SSDB, 0, Serialized) + { + Return (Buffer (0x5E) + { + /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, + /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03, + /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36, + /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00 + }) + } + } +} diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 25e6a30a6d..76e9efd36e 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -44,6 +44,9 @@ DefinitionBlock( #include "acpi/dptf.asl" } + /* MIPI camera */ + #include "acpi/mipi_camera.asl" + #if IS_ENABLED(CONFIG_CHROMEOS) // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb index ac99a211ef..c1974ad718 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb @@ -37,6 +37,8 @@ chip soc/intel/skylake register "HeciEnabled" = "0" register "SaGv" = "3" register "PmTimerDisabled" = "1" + register "Cio2Enable" = "1" + register "SaImguEnable" = "1" register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" @@ -186,8 +188,8 @@ chip soc/intel/skylake register "SerialIoDevMode" = "{ \ [PchSerialIoIndexI2C0] = PchSerialIoPci, \ [PchSerialIoIndexI2C1] = PchSerialIoPci, \ - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, \ - [PchSerialIoIndexI2C3] = PchSerialIoDisabled, \ + [PchSerialIoIndexI2C2] = PchSerialIoPci, \ + [PchSerialIoIndexI2C3] = PchSerialIoPci, \ [PchSerialIoIndexI2C4] = PchSerialIoPci, \ [PchSerialIoIndexI2C5] = PchSerialIoDisabled, \ [PchSerialIoIndexSpi0] = PchSerialIoDisabled, \ @@ -214,8 +216,8 @@ chip soc/intel/skylake device pci 14.2 on end # Thermal Subsystem device pci 15.0 on end # I2C #0 device pci 15.1 on end # I2C #1 - device pci 15.2 off end # I2C #2 - device pci 15.3 off end # I2C #3 + device pci 15.2 on end # I2C #2 + device pci 15.3 on end # I2C #3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R |