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author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-20 19:16:55 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2016-09-20 21:28:43 +0200 |
commit | 22710a66ac8f01fc4556bb1eaaa50c30352881df (patch) | |
tree | ef05ae17bd2e4847bc93bae0a805993d1a1de654 | |
parent | ddb2465f8b04cd738b041930ebbfc8fde6952bc4 (diff) | |
download | coreboot-22710a66ac8f01fc4556bb1eaaa50c30352881df.tar.xz |
northbridge/intel/e7505/debug.c: Improve code formatting
Change-Id: I63f58d95fa01b1f73f3620a5d13f21ef62e2404c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16588
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r-- | src/northbridge/intel/e7505/debug.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c index d2536b5a02..e31106e059 100644 --- a/src/northbridge/intel/e7505/debug.c +++ b/src/northbridge/intel/e7505/debug.c @@ -78,8 +78,8 @@ void dump_pci_devices_on_bus(unsigned busn) uint32_t id; id = pci_read_config32(dev, PCI_VENDOR_ID); if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { + (((id >> 16) & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0x0000)) { continue; } dump_pci_device(dev); @@ -156,7 +156,6 @@ void dump_smbus_registers(void) void dump_io_resources(unsigned port) { - int i; printk(BIOS_DEBUG, "%04x:\n", port); for (i = 0; i < 256; i++) { |