diff options
author | Marc Jones <marcj303@gmail.com> | 2017-07-25 16:00:58 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-08-04 14:22:55 +0000 |
commit | 241bd40966e1cdddd05a159746c4ab8dc3438534 (patch) | |
tree | 70dc897c6be24742d8b0d8d967eb138b427ce0b2 | |
parent | 9156cac2ef9e7d07de92b4e1430518a9918cf52d (diff) | |
download | coreboot-241bd40966e1cdddd05a159746c4ab8dc3438534.tar.xz |
google/kahlee: Add ChromeOS SMBIOS Board ID
Kahlee uses 3 GPIO(144, 140, 135) pins to identify the
board revision.
Change-Id: Ia9693db6d6506af7ff40db0b3ce4cc6c1469f6ef
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r-- | src/mainboard/google/kahlee/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/google/kahlee/Makefile.inc | 2 | ||||
-rw-r--r-- | src/mainboard/google/kahlee/boardid.c | 36 |
3 files changed, 39 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index c4ed275199..ad12d8c20c 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MP_TABLE select HAVE_ACPI_TABLES select GFXUMA + select GOOGLE_SMBIOS_MAINBOARD_VERSION select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/kahlee/Makefile.inc b/src/mainboard/google/kahlee/Makefile.inc index 6db037f726..faf061cdbe 100644 --- a/src/mainboard/google/kahlee/Makefile.inc +++ b/src/mainboard/google/kahlee/Makefile.inc @@ -20,11 +20,13 @@ bootblock-y += ec.c bootblock-y += gpio.c romstage-y += BiosCallOuts.c +romstage-y += boardid.c romstage-y += chromeos.c romstage-y += gpio.c romstage-y += OemCustomize.c ramstage-y += BiosCallOuts.c +ramstage-y += boardid.c ramstage-y += chromeos.c ramstage-y += ec.c ramstage-y += gpio.c diff --git a/src/mainboard/google/kahlee/boardid.c b/src/mainboard/google/kahlee/boardid.c new file mode 100644 index 0000000000..f19b032526 --- /dev/null +++ b/src/mainboard/google/kahlee/boardid.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <boardid.h> +#include <console/console.h> +#include <gpio.h> + +uint8_t board_id(void) +{ + MAYBE_STATIC int id = -1; + + gpio_t gpios[] = { + GPIO_135, + GPIO_140, + GPIO_144, + }; + + if (id < 0) { + id = gpio_base2_value(gpios, ARRAY_SIZE(gpios)); + printk(BIOS_SPEW, "Board ID: %#x.\n", id); + } + + return id; +} |