diff options
| author | Keith Hui <buurin@gmail.com> | 2020-04-29 16:16:26 -0400 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-04 09:39:06 +0000 |
| commit | 336d9a214843c4312eea9f00f2ce7c74ca87500b (patch) | |
| tree | ff6fd65e40a0b934c4911ef4eb92b4367e0f543a | |
| parent | 40a3888128f6cd967666eaaf158c40185368baf9 (diff) | |
| download | coreboot-336d9a214843c4312eea9f00f2ce7c74ca87500b.tar.xz | |
sb/intel/i82371eb: Move wakeup code to romstage
This code is needed in romstage, not ramstage.
Change-Id: Ic38c3c50fb135fba582864a242348ec29cec2991
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40965
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/southbridge/intel/i82371eb/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82371eb/Makefile.inc b/src/southbridge/intel/i82371eb/Makefile.inc index 1a1a0a10ea..327c424433 100644 --- a/src/southbridge/intel/i82371eb/Makefile.inc +++ b/src/southbridge/intel/i82371eb/Makefile.inc @@ -24,8 +24,8 @@ ramstage-y += usb.c ramstage-y += smbus.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.c -ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.c +romstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.c romstage-y += early_pm.c romstage-y += early_smbus.c |