AGESA binaryPI: Consolidate and fix sleep states

SSFG was meant to be used as a mask to enable sleep states
_S1 thru _S4. However as a logical instead of bitwise 'and'
operation was used, all the states were enabled if only
one was marked available.

State _S3 is now set conditionally if HAVE_ACPI_RESUME=y.
For pi/hudson this had been fixed already preprocessor.

Note that all boards had SSFG == 0x0D that previously
enabled ACPI S3 sleep state even when it was not available.
States _S1 and _S2 still appear enabled in ASL/AML
but may not actually work.

TEST: 'cat /sys/power/state' and notice choice 'mem' was
removed from the list of available sleep states.

Change-Id: I27d616871c1771f0c87d8fba23d4ce1569607765
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>

64 files changed, 52 insertions, 319 deletions

diff --git a/src/mainboard/amd/bettong/acpi/mainboard.asl b/src/mainboard/amd/bettong/acpi/mainboard.asl
index 508daa7234..db5731f088 100644
--- a/src/mainboard/amd/bettong/acpi/mainboard.asl
+++ b/src/mainboard/amd/bettong/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/bettong/dsdt.asl b/src/mainboard/amd/bettong/dsdt.asl
index 2e6c96c567..37257c42ff 100644
--- a/src/mainboard/amd/bettong/dsdt.asl
+++ b/src/mainboard/amd/bettong/dsdt.asl
@@ -38,7 +38,7 @@ DefinitionBlock (
 	#include <cpu/amd/pi/00660F01/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/pi/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl b/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl
+++ b/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/db-ft3b-lc/dsdt.asl b/src/mainboard/amd/db-ft3b-lc/dsdt.asl
index 45ae428d9f..03d46dcf76 100644
--- a/src/mainboard/amd/db-ft3b-lc/dsdt.asl
+++ b/src/mainboard/amd/db-ft3b-lc/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/pi/00730F01/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/pi/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/dinar/dsdt.asl b/src/mainboard/amd/dinar/dsdt.asl
index 8e51d3148d..773e5ba091 100644
--- a/src/mainboard/amd/dinar/dsdt.asl
+++ b/src/mainboard/amd/dinar/dsdt.asl
@@ -35,8 +35,6 @@ DefinitionBlock (
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)  /* Base address of PCIe config space */
 	Name(HPBA, 0xFED00000)  /* Base address of HPET table */
 
-	Name(SSFG, 0x0D)                /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSV, Ones) /* Assume nothing */
 	Name(GPIC, 0x1) /* Assume PIC */
@@ -668,27 +666,8 @@ DefinitionBlock (
 		}
 	}   /* End Scope(_SB)  */
 
-
-	/* Supported sleep states: */
-	Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )        /* (S0) - working state */
-
-	If (LAnd(SSFG, 0x01)) {
-		Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )        /* (S1) - sleeping w/CPU context */
-	}
-	If (LAnd(SSFG, 0x02)) {
-		Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )        /* (S2) - "light" Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x04)) {
-		Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )        /* (S3) - Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x08)) {
-		Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )        /* (S4) - Suspend to Disk */
-	}
-
-	Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )        /* (S5) - Soft Off */
-
-	Name(\_SB.CSPS ,0)                              /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-	Name(CSMS, 0)                   /* Current System State */
+	/* Contains the supported sleep states for this chipset */
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Wake status package */
 	Name(WKST,Package(){Zero, Zero})
diff --git a/src/mainboard/amd/inagua/acpi/mainboard.asl b/src/mainboard/amd/inagua/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/amd/inagua/acpi/mainboard.asl
+++ b/src/mainboard/amd/inagua/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/inagua/dsdt.asl b/src/mainboard/amd/inagua/dsdt.asl
index 0cf657f23a..7a6d2e192c 100644
--- a/src/mainboard/amd/inagua/dsdt.asl
+++ b/src/mainboard/amd/inagua/dsdt.asl
@@ -53,7 +53,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/lamar/acpi/mainboard.asl b/src/mainboard/amd/lamar/acpi/mainboard.asl
index 015f8df5a5..d251657e0b 100644
--- a/src/mainboard/amd/lamar/acpi/mainboard.asl
+++ b/src/mainboard/amd/lamar/acpi/mainboard.asl
@@ -24,8 +24,6 @@
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 	Name(OSV, Ones) /* Assume nothing */
diff --git a/src/mainboard/amd/lamar/dsdt.asl b/src/mainboard/amd/lamar/dsdt.asl
index 1692fab905..1f3f2916e4 100644
--- a/src/mainboard/amd/lamar/dsdt.asl
+++ b/src/mainboard/amd/lamar/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/pi/00630F01/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/pi/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/olivehill/acpi/mainboard.asl b/src/mainboard/amd/olivehill/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/amd/olivehill/acpi/mainboard.asl
+++ b/src/mainboard/amd/olivehill/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/olivehill/dsdt.asl b/src/mainboard/amd/olivehill/dsdt.asl
index b84f7986e5..e70998921c 100644
--- a/src/mainboard/amd/olivehill/dsdt.asl
+++ b/src/mainboard/amd/olivehill/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/olivehillplus/acpi/mainboard.asl b/src/mainboard/amd/olivehillplus/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/amd/olivehillplus/acpi/mainboard.asl
+++ b/src/mainboard/amd/olivehillplus/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/olivehillplus/dsdt.asl b/src/mainboard/amd/olivehillplus/dsdt.asl
index 45ae428d9f..03d46dcf76 100644
--- a/src/mainboard/amd/olivehillplus/dsdt.asl
+++ b/src/mainboard/amd/olivehillplus/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/pi/00730F01/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/pi/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/parmer/acpi/mainboard.asl b/src/mainboard/amd/parmer/acpi/mainboard.asl
index d4b9e0a2db..fb75289e55 100644
--- a/src/mainboard/amd/parmer/acpi/mainboard.asl
+++ b/src/mainboard/amd/parmer/acpi/mainboard.asl
@@ -24,8 +24,6 @@
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 	Name(OSV, Ones) /* Assume nothing */
diff --git a/src/mainboard/amd/parmer/dsdt.asl b/src/mainboard/amd/parmer/dsdt.asl
index a986ed50d2..01f9da1f3c 100644
--- a/src/mainboard/amd/parmer/dsdt.asl
+++ b/src/mainboard/amd/parmer/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family15tn/acpi/cpu.asl>
 
 	/* Describe the supported Sleep States for this Southbridge */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/persimmon/acpi/mainboard.asl b/src/mainboard/amd/persimmon/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/amd/persimmon/acpi/mainboard.asl
+++ b/src/mainboard/amd/persimmon/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl
index 0cf657f23a..7a6d2e192c 100644
--- a/src/mainboard/amd/persimmon/dsdt.asl
+++ b/src/mainboard/amd/persimmon/dsdt.asl
@@ -53,7 +53,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/south_station/acpi/mainboard.asl b/src/mainboard/amd/south_station/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/amd/south_station/acpi/mainboard.asl
+++ b/src/mainboard/amd/south_station/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/south_station/dsdt.asl b/src/mainboard/amd/south_station/dsdt.asl
index 0cf657f23a..7a6d2e192c 100644
--- a/src/mainboard/amd/south_station/dsdt.asl
+++ b/src/mainboard/amd/south_station/dsdt.asl
@@ -53,7 +53,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/thatcher/acpi/mainboard.asl b/src/mainboard/amd/thatcher/acpi/mainboard.asl
index d4b9e0a2db..fb75289e55 100644
--- a/src/mainboard/amd/thatcher/acpi/mainboard.asl
+++ b/src/mainboard/amd/thatcher/acpi/mainboard.asl
@@ -24,8 +24,6 @@
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 	Name(OSV, Ones) /* Assume nothing */
diff --git a/src/mainboard/amd/thatcher/dsdt.asl b/src/mainboard/amd/thatcher/dsdt.asl
index a986ed50d2..01f9da1f3c 100644
--- a/src/mainboard/amd/thatcher/dsdt.asl
+++ b/src/mainboard/amd/thatcher/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family15tn/acpi/cpu.asl>
 
 	/* Describe the supported Sleep States for this Southbridge */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/amd/torpedo/dsdt.asl b/src/mainboard/amd/torpedo/dsdt.asl
index cc830dc973..6947cc2635 100644
--- a/src/mainboard/amd/torpedo/dsdt.asl
+++ b/src/mainboard/amd/torpedo/dsdt.asl
@@ -35,8 +35,6 @@ DefinitionBlock (
 	Name(PCBA, 0xE0000000)	/* Base address of PCIe config space */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSV, Ones)	/* Assume nothing */
 	Name(GPIC, 0x1)	/* Assume PIC */
@@ -639,27 +637,8 @@ DefinitionBlock (
 		}
 	}   /* End Scope(_SB)  */
 
-
-	/* Supported sleep states: */
-	Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-	If (LAnd(SSFG, 0x01)) {
-		Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-	}
-	If (LAnd(SSFG, 0x02)) {
-		Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x04)) {
-		Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x08)) {
-		Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-	}
-
-	Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-	Name(\_SB.CSPS ,0)				/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-	Name(CSMS, 0)			/* Current System State */
+	/* Contains the supported sleep states for this chipset */
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Wake status package */
 	Name(WKST,Package(){Zero, Zero})
diff --git a/src/mainboard/amd/union_station/acpi/mainboard.asl b/src/mainboard/amd/union_station/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/amd/union_station/acpi/mainboard.asl
+++ b/src/mainboard/amd/union_station/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/amd/union_station/dsdt.asl b/src/mainboard/amd/union_station/dsdt.asl
index 0cf657f23a..7a6d2e192c 100644
--- a/src/mainboard/amd/union_station/dsdt.asl
+++ b/src/mainboard/amd/union_station/dsdt.asl
@@ -53,7 +53,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/asrock/e350m1/acpi/mainboard.asl b/src/mainboard/asrock/e350m1/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/asrock/e350m1/acpi/mainboard.asl
+++ b/src/mainboard/asrock/e350m1/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/asrock/e350m1/dsdt.asl b/src/mainboard/asrock/e350m1/dsdt.asl
index 4b48935d03..c70ba80b8a 100644
--- a/src/mainboard/asrock/e350m1/dsdt.asl
+++ b/src/mainboard/asrock/e350m1/dsdt.asl
@@ -49,7 +49,7 @@ DefinitionBlock (
 	#include "acpi/superio.asl"
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/asrock/imb-a180/acpi/mainboard.asl b/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
+++ b/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/asrock/imb-a180/dsdt.asl b/src/mainboard/asrock/imb-a180/dsdt.asl
index b84f7986e5..e70998921c 100644
--- a/src/mainboard/asrock/imb-a180/dsdt.asl
+++ b/src/mainboard/asrock/imb-a180/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/asus/f2a85-m/acpi/mainboard.asl b/src/mainboard/asus/f2a85-m/acpi/mainboard.asl
index f88ad688cd..8398c88c68 100644
--- a/src/mainboard/asus/f2a85-m/acpi/mainboard.asl
+++ b/src/mainboard/asus/f2a85-m/acpi/mainboard.asl
@@ -24,8 +24,6 @@
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 	Name(OSV, Ones) /* Assume nothing */
diff --git a/src/mainboard/asus/f2a85-m/dsdt.asl b/src/mainboard/asus/f2a85-m/dsdt.asl
index f022d4de36..76f1272b31 100644
--- a/src/mainboard/asus/f2a85-m/dsdt.asl
+++ b/src/mainboard/asus/f2a85-m/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family15tn/acpi/cpu.asl>
 
 	/* Describe the supported Sleep States for this Southbridge */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl b/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl
+++ b/src/mainboard/bap/ode_e20XX/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/bap/ode_e20XX/dsdt.asl b/src/mainboard/bap/ode_e20XX/dsdt.asl
index b84f7986e5..e70998921c 100644
--- a/src/mainboard/bap/ode_e20XX/dsdt.asl
+++ b/src/mainboard/bap/ode_e20XX/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/bap/ode_e21XX/acpi/mainboard.asl b/src/mainboard/bap/ode_e21XX/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/bap/ode_e21XX/acpi/mainboard.asl
+++ b/src/mainboard/bap/ode_e21XX/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/bap/ode_e21XX/dsdt.asl b/src/mainboard/bap/ode_e21XX/dsdt.asl
index 3afae7a8a6..306be9fae3 100644
--- a/src/mainboard/bap/ode_e21XX/dsdt.asl
+++ b/src/mainboard/bap/ode_e21XX/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/pi/00730F01/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/pi/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/biostar/am1ml/acpi/mainboard.asl b/src/mainboard/biostar/am1ml/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/biostar/am1ml/acpi/mainboard.asl
+++ b/src/mainboard/biostar/am1ml/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/biostar/am1ml/dsdt.asl b/src/mainboard/biostar/am1ml/dsdt.asl
index b3d59b291b..281669c511 100644
--- a/src/mainboard/biostar/am1ml/dsdt.asl
+++ b/src/mainboard/biostar/am1ml/dsdt.asl
@@ -40,7 +40,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/elmex/pcm205400/acpi/mainboard.asl b/src/mainboard/elmex/pcm205400/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/elmex/pcm205400/acpi/mainboard.asl
+++ b/src/mainboard/elmex/pcm205400/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/elmex/pcm205400/dsdt.asl b/src/mainboard/elmex/pcm205400/dsdt.asl
index 0cf657f23a..7a6d2e192c 100644
--- a/src/mainboard/elmex/pcm205400/dsdt.asl
+++ b/src/mainboard/elmex/pcm205400/dsdt.asl
@@ -53,7 +53,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl b/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl
index 4ee8efca0a..651c8a6fb0 100644
--- a/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl
+++ b/src/mainboard/gizmosphere/gizmo/acpi/mainboard.asl
@@ -24,8 +24,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/gizmosphere/gizmo/dsdt.asl b/src/mainboard/gizmosphere/gizmo/dsdt.asl
index 8ffe096256..50fe46a65b 100644
--- a/src/mainboard/gizmosphere/gizmo/dsdt.asl
+++ b/src/mainboard/gizmosphere/gizmo/dsdt.asl
@@ -48,7 +48,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl b/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl
+++ b/src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/gizmosphere/gizmo2/dsdt.asl b/src/mainboard/gizmosphere/gizmo2/dsdt.asl
index b84f7986e5..e70998921c 100644
--- a/src/mainboard/gizmosphere/gizmo2/dsdt.asl
+++ b/src/mainboard/gizmosphere/gizmo2/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/hp/abm/acpi/mainboard.asl b/src/mainboard/hp/abm/acpi/mainboard.asl
index 76365ad15e..ed97d4e669 100644
--- a/src/mainboard/hp/abm/acpi/mainboard.asl
+++ b/src/mainboard/hp/abm/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/hp/abm/dsdt.asl b/src/mainboard/hp/abm/dsdt.asl
index b84f7986e5..e70998921c 100644
--- a/src/mainboard/hp/abm/dsdt.asl
+++ b/src/mainboard/hp/abm/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
index a2a8d5ee0b..5068e9fe9e 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
@@ -24,8 +24,6 @@
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 	Name(OSV, Ones) /* Assume nothing */
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/dsdt.asl b/src/mainboard/hp/pavilion_m6_1035dx/dsdt.asl
index 637d968c89..e486fef6fd 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/dsdt.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/dsdt.asl
@@ -41,7 +41,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family15tn/acpi/cpu.asl>
 
 	/* Describe the supported Sleep States for this Southbridge */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl b/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl
index 7e26bab43c..b5d60d4a92 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl
@@ -47,7 +47,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
index a2a8d5ee0b..5068e9fe9e 100644
--- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl
+++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
@@ -24,8 +24,6 @@
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 	Name(OSV, Ones) /* Assume nothing */
diff --git a/src/mainboard/lenovo/g505s/dsdt.asl b/src/mainboard/lenovo/g505s/dsdt.asl
index 45ddb305ee..74b67f7c39 100644
--- a/src/mainboard/lenovo/g505s/dsdt.asl
+++ b/src/mainboard/lenovo/g505s/dsdt.asl
@@ -41,7 +41,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family15rl/acpi/cpu.asl>
 
 	/* Describe the supported Sleep States for this Southbridge */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl
index 94612e62e9..583421d400 100644
--- a/src/mainboard/lippert/frontrunner-af/dsdt.asl
+++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl
@@ -35,8 +35,6 @@ DefinitionBlock (
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* USB overcurrent mapping pins.   */
 	Name(UOM0, 0)
 	Name(UOM1, 2)
@@ -791,26 +789,8 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 
-	/* Supported sleep states: */
-	Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-	If (LAnd(SSFG, 0x01)) {
-		Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-	}
-	If (LAnd(SSFG, 0x02)) {
-		Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x04)) {
-		Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x08)) {
-		Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-	}
-
-	Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-	Name(\_SB.CSPS ,0)				/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-	Name(CSMS, 0)			/* Current System State */
+	/* Contains the supported sleep states for this chipset */
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Wake status package */
 	Name(WKST,Package(){Zero, Zero})
diff --git a/src/mainboard/lippert/toucan-af/dsdt.asl b/src/mainboard/lippert/toucan-af/dsdt.asl
index 338ba5207a..898f9cc59e 100644
--- a/src/mainboard/lippert/toucan-af/dsdt.asl
+++ b/src/mainboard/lippert/toucan-af/dsdt.asl
@@ -35,8 +35,6 @@ DefinitionBlock (
 	Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* USB overcurrent mapping pins.   */
 	Name(UOM0, 0)
 	Name(UOM1, 2)
@@ -790,27 +788,8 @@ DefinitionBlock (
 
 	}   /* End Scope(_SB)  */
 
-
-	/* Supported sleep states: */
-	Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-	If (LAnd(SSFG, 0x01)) {
-		Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-	}
-	If (LAnd(SSFG, 0x02)) {
-		Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x04)) {
-		Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x08)) {
-		Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-	}
-
-	Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-	Name(\_SB.CSPS ,0)				/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-	Name(CSMS, 0)			/* Current System State */
+	/* Contains the supported sleep states for this chipset */
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Wake status package */
 	Name(WKST,Package(){Zero, Zero})
diff --git a/src/mainboard/msi/ms7721/acpi/mainboard.asl b/src/mainboard/msi/ms7721/acpi/mainboard.asl
index f88ad688cd..8398c88c68 100644
--- a/src/mainboard/msi/ms7721/acpi/mainboard.asl
+++ b/src/mainboard/msi/ms7721/acpi/mainboard.asl
@@ -24,8 +24,6 @@
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-	Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* Some global data */
 	Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 	Name(OSV, Ones) /* Assume nothing */
diff --git a/src/mainboard/msi/ms7721/dsdt.asl b/src/mainboard/msi/ms7721/dsdt.asl
index f1840f64b6..3e99df4ccc 100644
--- a/src/mainboard/msi/ms7721/dsdt.asl
+++ b/src/mainboard/msi/ms7721/dsdt.asl
@@ -37,7 +37,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family15tn/acpi/cpu.asl>
 
 	/* Describe the supported Sleep States for this Southbridge */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/pcengines/apu1/acpi/mainboard.asl b/src/mainboard/pcengines/apu1/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/pcengines/apu1/acpi/mainboard.asl
+++ b/src/mainboard/pcengines/apu1/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/pcengines/apu1/dsdt.asl b/src/mainboard/pcengines/apu1/dsdt.asl
index bd9dff2f56..17c07d7400 100644
--- a/src/mainboard/pcengines/apu1/dsdt.asl
+++ b/src/mainboard/pcengines/apu1/dsdt.asl
@@ -48,7 +48,7 @@ DefinitionBlock (
 	}   /* End Scope(_SB)  */
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/pcengines/apu2/acpi/mainboard.asl b/src/mainboard/pcengines/apu2/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/pcengines/apu2/acpi/mainboard.asl
+++ b/src/mainboard/pcengines/apu2/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/pcengines/apu2/dsdt.asl b/src/mainboard/pcengines/apu2/dsdt.asl
index 1fcd9054b4..d3fb3b1e6b 100644
--- a/src/mainboard/pcengines/apu2/dsdt.asl
+++ b/src/mainboard/pcengines/apu2/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/pi/00730F01/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/pi/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/supermicro/h8qgi/dsdt.asl b/src/mainboard/supermicro/h8qgi/dsdt.asl
index 3b0e326a5c..036bc1b249 100644
--- a/src/mainboard/supermicro/h8qgi/dsdt.asl
+++ b/src/mainboard/supermicro/h8qgi/dsdt.asl
@@ -36,8 +36,6 @@ DefinitionBlock (
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
-	Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* USB overcurrent mapping pins.   */
 	Name(UOM0, 0)
 	Name(UOM1, 2)
@@ -834,27 +832,8 @@ DefinitionBlock (
 
 	}   /* End Scope(_SB)  */
 
-
-	/* Supported sleep states: */
-	Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-	If (LAnd(SSFG, 0x01)) {
-		Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-	}
-	If (LAnd(SSFG, 0x02)) {
-		Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x04)) {
-		Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x08)) {
-		Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-	}
-
-	Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-	Name(\_SB.CSPS ,0)				/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-	Name(CSMS, 0)			/* Current System State */
+	/* Contains the supported sleep states for this chipset */
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Wake status package */
 	Name(WKST,Package(){Zero, Zero})
diff --git a/src/mainboard/supermicro/h8scm/dsdt.asl b/src/mainboard/supermicro/h8scm/dsdt.asl
index d1a926861e..b8e4c1859a 100644
--- a/src/mainboard/supermicro/h8scm/dsdt.asl
+++ b/src/mainboard/supermicro/h8scm/dsdt.asl
@@ -36,8 +36,6 @@ DefinitionBlock (
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
-	Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* USB overcurrent mapping pins.   */
 	Name(UOM0, 0)
 	Name(UOM1, 2)
@@ -834,27 +832,8 @@ DefinitionBlock (
 
 	}   /* End Scope(_SB)  */
 
-
-	/* Supported sleep states: */
-	Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-	If (LAnd(SSFG, 0x01)) {
-		Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-	}
-	If (LAnd(SSFG, 0x02)) {
-		Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x04)) {
-		Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x08)) {
-		Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-	}
-
-	Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-	Name(\_SB.CSPS ,0)				/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-	Name(CSMS, 0)			/* Current System State */
+	/* Contains the supported sleep states for this chipset */
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Wake status package */
 	Name(WKST,Package(){Zero, Zero})
diff --git a/src/mainboard/tyan/s8226/dsdt.asl b/src/mainboard/tyan/s8226/dsdt.asl
index 6c26ab626f..9e34a5a8c5 100644
--- a/src/mainboard/tyan/s8226/dsdt.asl
+++ b/src/mainboard/tyan/s8226/dsdt.asl
@@ -36,8 +36,6 @@ DefinitionBlock (
 	Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
-	Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 	/* USB overcurrent mapping pins.   */
 	Name(UOM0, 0)
 	Name(UOM1, 2)
@@ -834,27 +832,8 @@ DefinitionBlock (
 
 	}   /* End Scope(_SB)  */
 
-
-	/* Supported sleep states: */
-	Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-	If (LAnd(SSFG, 0x01)) {
-		Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-	}
-	If (LAnd(SSFG, 0x02)) {
-		Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x04)) {
-		Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-	}
-	If (LAnd(SSFG, 0x08)) {
-		Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-	}
-
-	Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-	Name(\_SB.CSPS ,0)				/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-	Name(CSMS, 0)			/* Current System State */
+	/* Contains the supported sleep states for this chipset */
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Wake status package */
 	Name(WKST,Package(){Zero, Zero})
diff --git a/src/southbridge/amd/agesa/hudson/acpi/sleepstates.asl b/src/southbridge/amd/agesa/hudson/acpi/sleepstates.asl
deleted file mode 100644
index 912c0df6fb..0000000000
--- a/src/southbridge/amd/agesa/hudson/acpi/sleepstates.asl
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* Supported sleep states: */
-Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-If (LAnd(SSFG, 0x01)) {
-	Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-}
-If (LAnd(SSFG, 0x02)) {
-	Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
-}
-If (LAnd(SSFG, 0x04)) {
-	Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-}
-If (LAnd(SSFG, 0x08)) {
-	Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-}
-
-Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-Name(\_SB.CSPS ,0)	/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-Name(CSMS, 0)		/* Current System State */
diff --git a/src/southbridge/amd/cimx/sb800/acpi/sleepstates.asl b/src/southbridge/amd/cimx/sb800/acpi/sleepstates.asl
deleted file mode 100644
index 8b20de3579..0000000000
--- a/src/southbridge/amd/cimx/sb800/acpi/sleepstates.asl
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* Supported sleep states: */
-Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
-
-If (LAnd(SSFG, 0x01)) {
-	Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
-}
-If (LAnd(SSFG, 0x04)) {
-	Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
-}
-If (LAnd(SSFG, 0x08)) {
-	Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
-}
-
-Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-Name(\_SB.CSPS ,0)				/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-Name(CSMS, 0)			/* Current System State */
diff --git a/src/southbridge/amd/pi/hudson/acpi/sleepstates.asl b/src/southbridge/amd/common/acpi/sleepstates.asl
index c8ad5204ee..2f3673878b 100644
--- a/src/southbridge/amd/pi/hudson/acpi/sleepstates.asl
+++ b/src/southbridge/amd/common/acpi/sleepstates.asl
@@ -14,25 +14,27 @@
  * GNU General Public License for more details.
  */
 
+/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
+#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+Name (SSFG, 0x0D)
+#else
+Name (SSFG, 0x09)
+#endif
+
 /* Supported sleep states: */
 Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
 
-If (LAnd(SSFG, 0x01)) {
+If (And(SSFG, 0x01)) {
 	Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
 }
-If (LAnd(SSFG, 0x02)) {
+If (And(SSFG, 0x02)) {
 	Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
 }
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
-If (LAnd(SSFG, 0x04)) {
+If (And(SSFG, 0x04)) {
 	Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
 }
-#endif
-If (LAnd(SSFG, 0x08)) {
+If (And(SSFG, 0x08)) {
 	Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
 }
 
 Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )	/* (S5) - Soft Off */
-
-Name(\_SB.CSPS ,0)	/* Current Sleep State (S0, S1, S2, S3, S4, S5) */
-Name(CSMS, 0)		/* Current System State */