summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-30 08:18:55 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-09 16:11:52 +0000
commit4841203c3ae7457564f8ef55682c5fa0239447a8 (patch)
tree78f635756a52a2104514c1e7439e6596fa4bedc9
parent3979def529ac6efeb37248e1bfc965112e6c86db (diff)
downloadcoreboot-4841203c3ae7457564f8ef55682c5fa0239447a8.tar.xz
binaryPI boards: Bulk remove BINARYPI_LEGACY_WRAPPER remains
These boards currently have no build-testing, so they degrade fast. Apply some of the build-tested changes we know to be good from pcengines/apu2 to get them a bit closer to using POSTCAR_STAGE=y. Change-Id: Ibc9a15ed5e91c6dd857f2dd02e37d0979dd6ae90 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37373 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
-rw-r--r--src/mainboard/amd/bettong/romstage.c21
-rw-r--r--src/mainboard/amd/db-ft3b-lc/romstage.c21
-rw-r--r--src/mainboard/amd/lamar/romstage.c22
-rw-r--r--src/mainboard/amd/olivehillplus/romstage.c17
-rw-r--r--src/mainboard/bap/ode_e21XX/romstage.c22
-rw-r--r--src/northbridge/amd/agesa/state_machine.h3
6 files changed, 4 insertions, 102 deletions
diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index 58430dcf17..0f41f714e3 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -38,30 +38,11 @@ static void romstage_main_template(void)
post_code(0x31);
console_init();
}
-
-
- /* Load MPB */
- val = cpuid_eax(1);
- printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
-
- post_code(0x37);
- AGESAWRAPPER(amdinitreset);
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
-
- post_code(0x39);
- AGESAWRAPPER(amdinitearly);
-
- post_code(0x40);
- AGESAWRAPPER(amdinitpost);
}
void agesa_postcar(struct sysinfo *cb)
{
- post_code(0x41);
- AGESAWRAPPER(amdinitenv);
-
+ /* After AMD_INIT_ENV -> move to ramstage ? */
if (acpi_is_wakeup_s4()) {
outb(0xEE, PM_INDEX);
outb(0x8, PM_DATA);
diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c
index a0c6b8d9f3..a3ad3a16e9 100644
--- a/src/mainboard/amd/db-ft3b-lc/romstage.c
+++ b/src/mainboard/amd/db-ft3b-lc/romstage.c
@@ -43,30 +43,11 @@ static void romstage_main_template(void)
post_code(0x31);
console_init();
}
-
- /* Load MPB */
- val = cpuid_eax(1);
- printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
-
- post_code(0x37);
- AGESAWRAPPER(amdinitreset);
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
-
- post_code(0x39);
- AGESAWRAPPER(amdinitearly);
-
- post_code(0x40);
- AGESAWRAPPER(amdinitpost);
}
void agesa_postcar(struct sysinfo *cb)
{
- post_code(0x41);
- AGESAWRAPPER(amdinitenv);
-
+ /* After AMD_INIT_ENV -> move to ramstage ? */
outb(0xEA, 0xCD6);
outb(0x1, 0xcd7);
}
diff --git a/src/mainboard/amd/lamar/romstage.c b/src/mainboard/amd/lamar/romstage.c
index 7f37990efc..a22b247f27 100644
--- a/src/mainboard/amd/lamar/romstage.c
+++ b/src/mainboard/amd/lamar/romstage.c
@@ -54,26 +54,4 @@ static void romstage_main_template(void)
post_code(0x31);
console_init();
}
-
- /* Load MPB */
- val = cpuid_eax(1);
- printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
-
- post_code(0x37);
- AGESAWRAPPER(amdinitreset);
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past hudson_early_setup\n");
-
- post_code(0x39);
- AGESAWRAPPER(amdinitearly);
-
- post_code(0x40);
- AGESAWRAPPER(amdinitpost);
-}
-
-void agesa_postcar(struct sysinfo *cb)
-{
- post_code(0x41);
- AGESAWRAPPER(amdinitenv);
}
diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index c04aafeff6..3dd7d531eb 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -59,26 +59,11 @@ static void romstage_main_template(void)
for (i = 0; i < 200000; i++)
inb(0xCD6);
}
-
- post_code(0x37);
- AGESAWRAPPER(amdinitreset);
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
-
- post_code(0x39);
- AGESAWRAPPER(amdinitearly);
-
- post_code(0x40);
- AGESAWRAPPER(amdinitpost);
}
void agesa_postcar(struct sysinfo *cb)
{
- //PspMboxBiosCmdDramInfo();
- post_code(0x41);
- AGESAWRAPPER(amdinitenv);
-
+ /* After AMD_INIT_ENV -> move to ramstage ? */
outb(0xEA, 0xCD6);
outb(0x1, 0xcd7);
}
diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c
index de39f18a75..9729ffb400 100644
--- a/src/mainboard/bap/ode_e21XX/romstage.c
+++ b/src/mainboard/bap/ode_e21XX/romstage.c
@@ -47,31 +47,11 @@ static void romstage_main_template(void)
post_code(0x31);
console_init();
}
-
- /* Load MPB */
- val = cpuid_eax(1);
- printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
-
- post_code(0x37);
- AGESAWRAPPER(amdinitreset);
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
-
- post_code(0x39);
- AGESAWRAPPER(amdinitearly);
-
- post_code(0x40);
- AGESAWRAPPER(amdinitpost);
}
void agesa_postcar(struct sysinfo *cb)
{
- //PspMboxBiosCmdDramInfo();
- post_code(0x41);
- AGESAWRAPPER(amdinitenv);
-
+ /* After AMD_INIT_ENV -> move to ramstage ? */
outb(0xEA, 0xCD6);
outb(0x1, 0xcd7);
}
diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h
index 02a7a41edc..9de011a062 100644
--- a/src/northbridge/amd/agesa/state_machine.h
+++ b/src/northbridge/amd/agesa/state_machine.h
@@ -44,9 +44,6 @@ struct sysinfo
int s3resume;
};
-void agesa_main(struct sysinfo *cb);
-void agesa_postcar(struct sysinfo *cb);
-
void board_BeforeAgesa(struct sysinfo *cb);
void platform_once(struct sysinfo *cb);