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| author | Aaron Durbin <adurbin@chromium.org> | 2015-09-07 23:05:28 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-09 19:34:31 +0000 |
| commit | 4b34909d099e395161b90c5528382450dc9937fc (patch) | |
| tree | 743818c34b6445e9f68d32075f01b65c7b092f5e | |
| parent | cd96c5cf95e68280f0ff19831555930bbb705dca (diff) | |
| download | coreboot-4b34909d099e395161b90c5528382450dc9937fc.tar.xz | |
x86: provide minimum alignment for romstage
The current way the XIP address of romstage is calculated is by
doing a 'cbfstool locate' using a bin file of romstage linked
at address 0. That address is then used for re-linking romstage at
the address spit out by cbfstool. Currently, the linker actually
sets minimum alignment on the text sections as 32 bytes, but it
doesn't actually honor that value. Instead, provide a minimum
alignment for romstage so as not to fight the linker.
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built asus/kfsn4-dre. Confirmed ROMSTAGE_BASE == gdtptr.
Change-Id: Id6ec65d257df9ede78c720b0d7d4b56acfbb3f15
Signed-off-by: Aaron Durbin <adubin@chromium.org>
Reviewed-on: http://review.coreboot.org/11588
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
| -rw-r--r-- | src/arch/x86/Makefile.inc | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index fe974efc85..10a94c3a32 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -207,9 +207,15 @@ $(objgenerated)/romstage.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xi sed -e '/^ROMSTAGE_BASE/d' $(objgenerated)/romstage_null.ld >> $@.tmp mv $@.tmp $@ +# Use a '-a 64' option to cbfstool locate to provide a minimum alignment +# requirement for the overall romstage. While the first object within +# romstage could have a 4 byte minimum alignment that doesn't mean the linker +# won't decide the entire section should be aligned to a larger value. In the +# future cbfstool should add XIP files proper and honor the alignment +# requirements of the program segment. $(objcbfs)/base_xip.txt: $(obj)/coreboot.pre1 $(objcbfs)/romstage_null.bin rm -f $@ - $(CBFSTOOL) $(obj)/coreboot.pre1 locate -T -f $(objcbfs)/romstage_null.bin -n $(CONFIG_CBFS_PREFIX)/romstage -P $(CONFIG_XIP_ROM_SIZE) > $@.tmp \ + $(CBFSTOOL) $(obj)/coreboot.pre1 locate -T -f $(objcbfs)/romstage_null.bin -n $(CONFIG_CBFS_PREFIX)/romstage -P $(CONFIG_XIP_ROM_SIZE) -a 64 > $@.tmp \ || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; } mv $@.tmp $@ |