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authorYong Zhi <yong.zhi@intel.com>2015-09-22 17:16:13 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-10-27 15:20:27 +0100
commit4f1fe47178bc7f9685b9316432e99d7e18aa039a (patch)
tree282f46e7c0be907d1da5a4fdbc1b48ac9cf25dfd
parent7d40e969e1bf5c333524e56ae22b6e25acd5b034 (diff)
downloadcoreboot-4f1fe47178bc7f9685b9316432e99d7e18aa039a.tar.xz
intel/kunimitsu: Add device properties for Nuvoton code
Add default properties for NAU8825 codec Change jack detecion irq to level to match the codec driver BUG=chrome-os-partner:44481 BRANCH=None TEST=Build and Boot Kunimitsu board with this patch Verify Audio jack detection IRQ working Change-Id: Iaab7a7bfbab30fa0914e56477f7c6a93717b4518 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 58c45538ea6a85724f9ab1837e5cf0971611a1f8 Original-Change-Id: I11466b8fd64b768e1e826639ba37bd6e00810370 Original-Signed-off-by: Yong Zhi <yong.zhi@intel.com> Original-Signed-off-by: Fang, Yang A <yang.a.fang@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/303760 Original-Commit-Ready: Yang Fang <yang.a.fang@intel.com> Original-Tested-by: Yang Fang <yang.a.fang@intel.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/12162 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/mainboard/intel/kunimitsu/acpi/mainboard.asl40
1 files changed, 39 insertions, 1 deletions
diff --git a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl
index 22f8403094..4f6251b9de 100644
--- a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl
+++ b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl
@@ -143,6 +143,44 @@ Scope (\_SB.PCI0.I2C4)
Name (_HID, "10508825")
Name (_DDN, "NAU88L25 Codec")
Name (_UID, 1)
+ Name (_DSD, Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ /* Enable jack detection via JKDET pin */
+ Package () { "nuvoton,jkdet-enable", 1 },
+ /*
+ * JKDET pin is pulled up by R389 on board.
+ * JKDET pin polarity = active low
+ */
+ Package () { "nuvoton,jkdet-pull-enable", 1 },
+ Package () { "nuvoton,jkdet-pull-up", 1 },
+ Package () { "nuvoton,jkdet-polarity", 1 },
+ /* VDDA(1.8) * 1.53 = 2.754 */
+ Package () { "nuvoton,micbias-voltage", 6 },
+ /* VREF Impedance = 125 kOhm */
+ Package () { "nuvoton,vref-impedance", 2 },
+ /*
+ * Setup 4 buttons impedance according to
+ * Android specification
+ */
+ Package () { "nuvoton,sar-threshold-num", 4 },
+ Package () { "nuvoton,sar-threshold",
+ Package() { 0x0a, 0x14, 0x26, 0x73 } },
+ /*
+ * Coeff 0-15 used to adjust threshold level
+ * 0 for low resist range
+ */
+ Package () { "nuvoton,sar-hysteresis", 0 },
+ /* SAR tracking gain based on 2.754 micbias-voltage */
+ Package () { "nuvoton,sar-voltage", 6 },
+ /* 100ms short key press debounce */
+ Package () { "nuvoton,short-key-debounce", 3 },
+ /* 2^(7+2) = 512 ms insert/eject debounce */
+ Package () { "nuvoton,jack-insert-debounce", 7 },
+ /* debounce not needed for eject normally */
+ Package () { "nuvoton,jack-eject-debounce", 0 },
+ }
+ })
Name (_CRS, ResourceTemplate()
{
@@ -153,7 +191,7 @@ Scope (\_SB.PCI0.I2C4)
AddressingMode7Bit,
"\\_SB.PCI0.I2C4",
)
- Interrupt (ResourceConsumer, Edge, ActiveLow)
+ Interrupt (ResourceConsumer, Level, ActiveLow)
{
BOARD_HP_MIC_CODEC_IRQ
}