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authorRonald G. Minnich <rminnich@google.com>2013-12-17 15:21:54 -0800
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-09-25 18:33:28 +0200
commit6481cfb15d62784b87eabe972a742fa1e3da129d (patch)
tree6885f2b46a9cc11e3cbaa37e813239f2bd7aa359
parente9e31892d20646be1bba0ee4175344f37e43469a (diff)
downloadcoreboot-6481cfb15d62784b87eabe972a742fa1e3da129d.tar.xz
peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards
Historically we had set panel timing in the mainboard gma code. This goes back to the replay-attack video startup. We can let the haswell gma code set these values from the device tree settings. Change-Id: If32150d2857241ca2d2c88880086f49d25815d76 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://chromium-review.googlesource.com/180521 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Ronald Minnich <rminnich@chromium.org> Tested-by: Ronald Minnich <rminnich@chromium.org> (cherry picked from commit 406eab3ca6a9bc59382866817786bf96bbb19d56) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6911 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
-rw-r--r--src/mainboard/google/falco/gma.c3
-rw-r--r--src/mainboard/google/peppy/gma.c5
-rw-r--r--src/northbridge/intel/haswell/gma.c1
3 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/google/falco/gma.c b/src/mainboard/google/falco/gma.c
index 4a5b7d03f3..6e3afdbf34 100644
--- a/src/mainboard/google/falco/gma.c
+++ b/src/mainboard/google/falco/gma.c
@@ -188,9 +188,6 @@ int panel_lightup(struct intel_dp *dp, unsigned int init_fb)
/* These values are used for training the link */
dp->lane_count = 2;
dp->link_bw = DP_LINK_BW_2_7;
- dp->panel_power_down_delay = 600;
- dp->panel_power_up_delay = 200;
- dp->panel_power_cycle_delay = 600;
dp->pipe = PIPE_A;
dp->port = PORT_A;
dp->plane = PLANE_A;
diff --git a/src/mainboard/google/peppy/gma.c b/src/mainboard/google/peppy/gma.c
index 0e954e0a3b..953dad9a09 100644
--- a/src/mainboard/google/peppy/gma.c
+++ b/src/mainboard/google/peppy/gma.c
@@ -214,11 +214,6 @@ int panel_lightup(struct intel_dp *dp, unsigned int init_fb)
dp->aux_clock_divider = 0xe1;
dp->precharge = 3;
- /* CRAP -- needs to be done elsewhere from the device tree. */
- dp->panel_power_down_delay = 600;
- dp->panel_power_up_delay = 200;
- dp->panel_power_cycle_delay = 600;
-
/* 1. Normal mode: Set the first page to zero and make
all GTT entries point to the same page
2. Developer/Recovery mode: Set up a tasteful color
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 015eabed0e..373f429eb1 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -460,7 +460,6 @@ static void gma_func0_init(struct device *dev)
dp.panel_power_up_delay = conf->gpu_panel_power_up_delay;
dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay;
- dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf;
#ifdef CONFIG_CHROMEOS
init_fb = developer_mode_enabled() || recovery_mode_enabled();
#endif