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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-06-26 23:20:13 +0200 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-06-27 00:27:14 +0200 |
commit | 714212a42115b205b132a901bf86b8876d6aa3f0 (patch) | |
tree | 30545c2d89a8d129272325c08a04f5eee45a0a04 | |
parent | 6a008363befb049291fa4a123aa38b2ab2a04701 (diff) | |
download | coreboot-714212a42115b205b132a901bf86b8876d6aa3f0.tar.xz |
Revert "Add support to enable/disable builtin GbE"
This reverts commit d358a506c4230950e34d783bd0187cd200d60691
http://review.coreboot.org/#/c/3514/ comments:
The pei_data version changed to 6, so new binaries are needed.
However, demand for new binary blob is not referenced with this commit nor is git submodules hash updated. Also the new binary blob almost doubles its size and no longer fits in the allocation sandybridge defines.
Change-Id: I84eb70517d5b9278c611fdfa587a71f6ca0f657f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3553
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
-rw-r--r-- | src/northbridge/intel/haswell/pei_data.h | 3 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/pei_data.h | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h index 7c10e41844..280c73b75a 100644 --- a/src/northbridge/intel/haswell/pei_data.h +++ b/src/northbridge/intel/haswell/pei_data.h @@ -31,7 +31,7 @@ #define PEI_DATA_H typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 11 +#define PEI_VERSION 10 struct pei_data { @@ -53,7 +53,6 @@ struct pei_data uint8_t spd_addresses[4]; int boot_mode; int ec_present; - int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index d317515cf0..fb56873d2b 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -38,7 +38,7 @@ typedef struct { } pch_usb3_controller_settings; typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 6 +#define PEI_VERSION 5 struct pei_data { @@ -61,7 +61,6 @@ struct pei_data uint8_t ts_addresses[4]; int boot_mode; int ec_present; - int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel |