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authorAnton Kochkov <anton.kochkov@gmail.com>2012-09-26 22:31:04 +0400
committerAnton Kochkov <anton.kochkov@gmail.com>2012-10-03 09:27:20 +0200
commit93a8b27cbed8a288ee6a65436ec22ad5a67fdbd0 (patch)
tree59cfd3b8ffd8bf261fa5a49932632ee6e776b141
parent89397fc342c7bf9005e68e28ab898c81b7fc2a66 (diff)
downloadcoreboot-93a8b27cbed8a288ee6a65436ec22ad5a67fdbd0.tar.xz
libpayload: Set 8bits per char for serial port
Previously we assume that hardware using 8 bits per char by default, but on Asrock A53 Pro this is not true (7 bit per char by default). Forcing use 8n1 now. Change-Id: Ib701725d2ec6dacd7862016b2045270956b27029 Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1541 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
-rw-r--r--payloads/libpayload/drivers/serial.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/payloads/libpayload/drivers/serial.c b/payloads/libpayload/drivers/serial.c
index c6804d2b2a..0f79b52c89 100644
--- a/payloads/libpayload/drivers/serial.c
+++ b/payloads/libpayload/drivers/serial.c
@@ -40,8 +40,6 @@ static void serial_io_hardware_init(int port, int speed, int word_bits, int pari
{
unsigned char reg;
- /* We will assume 8n1 for now. Does anyone use anything else these days? */
-
/* Disable interrupts. */
outb(0, port + 0x01);
@@ -56,8 +54,9 @@ static void serial_io_hardware_init(int port, int speed, int word_bits, int pari
outb(DIVISOR(speed) & 0xFF, port);
outb(DIVISOR(speed) >> 8 & 0xFF, port + 1);
- /* Restore the previous value of the divisor. */
- outb(reg & ~0x80, port + 0x03);
+ /* Restore the previous value of the divisor.
+ * And set 8 bits per character */
+ outb((reg & ~0x80) | 3, port + 0x03);
}
static void serial_mem_hardware_init(int port, int speed, int word_bits, int parity, int stop_bits)
@@ -80,8 +79,9 @@ static void serial_mem_hardware_init(int port, int speed, int word_bits, int par
writeb(DIVISOR(speed) & 0xFF, MEMBASE);
writeb(DIVISOR(speed) >> 8 & 0xFF, MEMBASE + 1);
- /* Restore the previous value of the divisor. */
- writeb(reg & ~0x80, MEMBASE + 0x03);
+ /* Restore the previous value of the divisor.
+ * And set 8 bits per character */
+ writeb((reg & ~0x80) | 3, MEMBASE + 0x03);
}
#endif