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authorAngel Pons <th3fanbus@gmail.com>2020-01-01 21:34:16 +0100
committerNico Huber <nico.h@gmx.de>2020-01-10 17:27:22 +0000
commit9636f2cb305a761a68f3c35b0e2595ba8048ec75 (patch)
treea1b5ea0e9917fcc0b4977eef0f033792a1719e28
parent12197db238bb5fb307ee7fe9d14929e0135e49f6 (diff)
downloadcoreboot-9636f2cb305a761a68f3c35b0e2595ba8048ec75.tar.xz
mb/hp/{folio_9470m,revolve_810_g1}: Trim gfx.did to size
These values are the same that were hardcoded in autoport before. As done in commit 08caa79 (util/autoport: Trim gfx.did to size), ensure that the hardcoded values make at least some sense. Change-Id: I9950fd10e45f5016611a5d5b6a9e41c2b0f25a5f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38086 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/hp/folio_9470m/devicetree.cb4
-rw-r--r--src/mainboard/hp/revolve_810_g1/devicetree.cb4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/hp/folio_9470m/devicetree.cb b/src/mainboard/hp/folio_9470m/devicetree.cb
index 13a12b6f2b..e04ab67a5c 100644
--- a/src/mainboard/hp/folio_9470m/devicetree.cb
+++ b/src/mainboard/hp/folio_9470m/devicetree.cb
@@ -14,8 +14,8 @@
# GNU General Public License for more details.
#
-chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
- register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+chip northbridge/intel/sandybridge
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.link_frequency_270_mhz" = "1"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
diff --git a/src/mainboard/hp/revolve_810_g1/devicetree.cb b/src/mainboard/hp/revolve_810_g1/devicetree.cb
index 0de3930ebd..048120ae0a 100644
--- a/src/mainboard/hp/revolve_810_g1/devicetree.cb
+++ b/src/mainboard/hp/revolve_810_g1/devicetree.cb
@@ -14,8 +14,8 @@
# GNU General Public License for more details.
#
-chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
- register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+chip northbridge/intel/sandybridge
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.link_frequency_270_mhz" = "1"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"