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author | Patrick Rudolph <siro@das-labor.org> | 2016-02-06 13:23:31 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2016-03-05 15:35:14 +0100 |
commit | 98b5f907ac6317a0e4fc11f429b7cfa858550964 (patch) | |
tree | b868a31f741c7443125ec60b3eb67a3b745e4573 | |
parent | 8e7928a6fe05a295ca412cb6a6df509de7b73f13 (diff) | |
download | coreboot-98b5f907ac6317a0e4fc11f429b7cfa858550964.tar.xz |
include/device/dram: Fix DDR3-1866
The PLL multiplier value is off by one for DDR3-1866 due to a
wrong TCK value, resulting in DDR3-1600 being used by the PLL.
Needs test on real hardware !
Change-Id: I657b813889945f0d9990dd11680a3d3a25b53467
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/13613
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r-- | src/include/device/dram/ddr3.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index da9dad2a57..d58cdce8e1 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -36,7 +36,7 @@ #define TCK_1333MHZ 192 #define TCK_1200MHZ 212 #define TCK_1066MHZ 240 -#define TCK_933MHZ 275 +#define TCK_933MHZ 274 #define TCK_800MHZ 320 #define TCK_666MHZ 384 #define TCK_533MHZ 480 |