diff options
author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-09-27 15:01:37 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-10-02 22:31:32 +0000 |
commit | a05fdcb2695a9d7c553c23ef6c35c37d7cd7b795 (patch) | |
tree | ef4ac74501958f7e44592fbb77ea22143ac5a20b | |
parent | f039a0befc9072c4e346f084c2a40dc8fd6de9fe (diff) | |
download | coreboot-a05fdcb2695a9d7c553c23ef6c35c37d7cd7b795.tar.xz |
amd/stoneyridge: Change SMM setup functions
Remove the APMC-specific initialization call. Make the function
which programs the event type not static and call it from the
southbridge.c file.
Change-Id: I1e3cf898637720fa835de0a6e735c6a65fe2d3a2
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/smi.h | 2 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/smi_util.c | 8 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 3 |
3 files changed, 4 insertions, 9 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h index 0a865b7496..797f4e8578 100644 --- a/src/soc/amd/stoneyridge/include/soc/smi.h +++ b/src/soc/amd/stoneyridge/include/soc/smi.h @@ -200,9 +200,9 @@ struct smi_sources_t { }; uint16_t pm_acpi_smi_cmd_port(void); +void configure_smi(uint8_t smi_num, uint8_t mode); void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); void disable_gevent_smi(uint8_t gevent); -void enable_acpi_cmd_smi(void); #ifndef __SMM__ void enable_smi_generation(void); diff --git a/src/soc/amd/stoneyridge/smi_util.c b/src/soc/amd/stoneyridge/smi_util.c index 833e6e37e6..96e9d6156b 100644 --- a/src/soc/amd/stoneyridge/smi_util.c +++ b/src/soc/amd/stoneyridge/smi_util.c @@ -9,7 +9,7 @@ #include <soc/southbridge.h> #include <soc/smi.h> -static void configure_smi(uint8_t smi_num, uint8_t mode) +void configure_smi(uint8_t smi_num, uint8_t mode) { uint8_t reg32_offset, bit_offset; uint32_t reg32; @@ -69,12 +69,6 @@ void disable_gevent_smi(uint8_t gevent) configure_smi(gevent, SMI_MODE_DISABLE); } -/** Enable SMIs on writes to ACPI SMI command port */ -void enable_acpi_cmd_smi(void) -{ - configure_smi(SMITYPE_SMI_CMD_PORT, SMI_MODE_SMI); -} - uint16_t pm_acpi_smi_cmd_port(void) { return pm_read16(PM_ACPI_SMI_CMD); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 3356e97752..b947be123f 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -57,8 +57,9 @@ static void sb_init_acpi_ports(void) pm_write16(PM_CPU_CTRL, ACPI_CPU_CONTROL); if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) { + /* APMC - SMI Command Port */ pm_write16(PM_ACPI_SMI_CMD, APM_CNT); - enable_acpi_cmd_smi(); + configure_smi(SMITYPE_SMI_CMD_PORT, SMI_MODE_SMI); } else { pm_write16(PM_ACPI_SMI_CMD, 0); } |