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author | Ronald G. Minnich <rminnich@gmail.com> | 2003-07-11 14:51:29 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-07-11 14:51:29 +0000 |
commit | a3c708b5d2b4857b19a992ae9694a29e0fa8d9a2 (patch) | |
tree | 617507dd374d6a38777f92a0794f33f91ed8b5ba | |
parent | 2fceb77c47a168df38ca7f3b6b57ff9acc71679b (diff) | |
download | coreboot-a3c708b5d2b4857b19a992ae9694a29e0fa8d9a2.tar.xz |
static configuration. Needs new keyword per greg to enable inclusion of a
part-specific struct into the tree.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/include/device/chip.h | 8 | ||||
-rw-r--r-- | src/mainboard/arima/hdama/Config.lb | 5 | ||||
-rw-r--r-- | targets/arima/hdama/Config.lb | 2 | ||||
-rw-r--r-- | util/newconfig/config.g | 68 |
4 files changed, 67 insertions, 16 deletions
diff --git a/src/include/device/chip.h b/src/include/device/chip.h index 75e69120f3..ea57ea4b5c 100644 --- a/src/include/device/chip.h +++ b/src/include/device/chip.h @@ -1,7 +1,8 @@ /* chips are arbitrary chips (superio, southbridge, etc.) * They have private structures that define chip resources and default * settings. They have four externally visible functions for control. - * new settings are provided as ascii strings. + * They have a generic component which applies to all chips for + * path, etc. */ /* some of the types of resources chips can control */ @@ -30,6 +31,7 @@ struct lpt_ports { struct chip; +/* there is one of these for each TYPE of chip */ struct chip_control { void (*alloc)(struct chip *s); void (*pre_pci_init)(struct chip *s); @@ -46,5 +48,9 @@ struct chip { struct chip_control *control; /* for this device */ char *path; /* can be 0, in which case the default is taken */ char *configuration; /* can be 0. */ + int irq; + struct chip *next, *children; + /* there is one of these for each INSTANCE of a chip */ + void *chip_info; /* the dreaded "void *" */ }; diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb index 15e94dbf52..6ef3dcb4ff 100644 --- a/src/mainboard/arima/hdama/Config.lb +++ b/src/mainboard/arima/hdama/Config.lb @@ -20,7 +20,7 @@ if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end # arch i386 end -cpu k8 end +#cpu k8 end # ### ### Build our 16 bit and 32 bit linuxBIOS entry code @@ -34,7 +34,6 @@ ldscript /cpu/i386/entry32.lds ### Build our reset vector (This is where linuxBIOS is entered) ### if USE_FALLBACK_IMAGE - print "Use fallback!" mainboardinit cpu/i386/reset16.inc ldscript /cpu/i386/reset16.lds else @@ -128,7 +127,7 @@ southbridge amd/amd8111 end #mainboardinit archi386/smp/secondary.inc superio NSC/pc87360 - register "com1={1} com2={0} floppy=1 lpt=1 keyboard=1" + register ".com1={1}, .com2={0}, .floppy=1, .lpt=1, .keyboard=1" end dir /pc80 ##dir /src/superio/winbond/w83627hf diff --git a/targets/arima/hdama/Config.lb b/targets/arima/hdama/Config.lb index 1571d42acf..cb21b6e4ab 100644 --- a/targets/arima/hdama/Config.lb +++ b/targets/arima/hdama/Config.lb @@ -4,7 +4,7 @@ loadoptions -target ./hdama +target hdama uses AMD8111_DEV uses CONFIG_COMPRESS diff --git a/util/newconfig/config.g b/util/newconfig/config.g index 7b7b89ce25..2e2f4352df 100644 --- a/util/newconfig/config.g +++ b/util/newconfig/config.g @@ -197,7 +197,7 @@ class option: return (self.used) class partobj: - def __init__ (self, dir, parent, type): + def __init__ (self, dir, parent, type, name): global partinstance if (debug): print "partobj dir %s parent %s type %s" %(dir,parent,type) @@ -211,12 +211,20 @@ class partobj: self.dir = dir self.irq = 0 self.instance = partinstance + 1 + self.flatten_name = flatten_name(type + "/" + name) if (debug): print "INSTANCE %d" % self.instance partinstance = partinstance + 1 self.devfn = 0 self.private = 0 self.options = {} + # chip initialization. If there is a chip.h in the + # directory, generate the structs etc. to + # initialize the code + self.chipconfig = 0 + if (os.path.exists(dir + "/" + "chip.h")): + self.chipconfig = 1 + if (parent): if (debug): print "add to parent" @@ -235,6 +243,7 @@ class partobj: print "%d: type %s" % (lvl, self.type) print "%d: instance %d" % (lvl, self.instance) print "%d: dir %s" % (lvl,self.dir) + print "%d: flatten_name %s" % (lvl,self.flatten_name) print "%d: parent %s" % (lvl,self.parent.type) print "%d: parent dir %s" % (lvl,self.parent.dir) if (self.children): @@ -250,17 +259,40 @@ class partobj: print "\n" def gencode(self, file): - file.write("struct cdev dev%d = {\n" % self.instance) + if (self.chipconfig): + file.write("struct %s_config %s_config_%d" % (\ + self.flatten_name ,\ + self.flatten_name , \ + self.instance)) + if (self.registercode): + file.write("\t= {\n") + for i in self.registercode: + file.write( "\t %s" % i) + file.write("\t}\n") + else: + file.write(";") + file.write("\n"); + file.write("struct chip dev%d = {\n" % self.instance) file.write("/* %s %s */\n" % (self.type, self.dir)) - file.write(" .devfn = %d\n" % self.devfn) + #file.write(" .devfn = %d,\n" % self.devfn) if (self.siblings): - file.write(" .next = &dev%d\n" % self.siblings.instance) + file.write(" .next = &dev%d,\n" % self.siblings.instance) if (self.children): - file.write(" .children = &dev%d\n" % \ + file.write(" .children = &dev%d,\n" % \ self.children.instance) if (self.private): - file.write(" .private = private%d\n" % self.instance) + file.write(" .private = private%d,\n" % self.instance) + if (self.chipconfig): + # set the pointer to the structure for all this + # type of part + file.write(" .control= &%s_control,\n" % \ + self.flatten_name ) + # generate the pointer to the isntance + # of the chip struct + file.write(" .chip_config = (void *) &%s_config_%d,\n" %\ + (self.flatten_name, self.instance )) file.write("};\n") + def irq(self, irq): @@ -270,6 +302,7 @@ class partobj: self.initcode.append(code) def addregister(self, code): + code = dequote(code) self.registercode.append(code) def usesoption(self, name): @@ -587,14 +620,14 @@ def target(targ_name): print "Creating directory %s" % target_dir os.makedirs(target_dir) print "Will place Makefile, crt0.S, etc. in %s" % target_dir - root = partobj(target_dir, 0, 'board') + root = partobj(target_dir, 0, 'board', targ_name) curpart = root def part(name, path, file): global curpart,curdir,treetop dirstack.append(curdir) curdir = os.path.join(treetop, 'src', name, path) - newpart = partobj(curdir, curpart, name) + newpart = partobj(curdir, curpart, name, path) print "Configuring PART %s, path %s\n" % (name,path) if (debug): print "PUSH part %s %s" % (name, curpart.dir) @@ -679,6 +712,10 @@ def dequote(str): a = re.sub("\\\\\"", "\"", a) return a +def flatten_name(str): + a = re.sub("/", "_", str) + return a + def addaction(id, str): o = getvalue(makebaserules, id) a = dequote(str) @@ -1177,9 +1214,9 @@ def gencode(part, file): # dump the siblings -- actually are there any? not sure # dump the kids if (debug): - print "GENCODE KID is" - kid = part - while (kid.siblings): + print "GENCODE SIBLINGS are" + kid = part.siblings + while (kid): kid.gencode(file) kid = kid.siblings if (debug): @@ -1220,7 +1257,16 @@ if __name__=='__main__': filename = os.path.join(target_dir, "chips.c") print "Creating", filename file = open(filename, 'w+') + # gen all the forward references + + i = 0 + file.write("struct chip ") + while (i <= partinstance): + file.write("cdev%d "% i) + i = i + 1 + file.write(";\n") gencode(root, file) + file.close() # crt0 includes if (debug): |