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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-07-28 13:45:29 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-10-23 20:03:18 +0200 |
| commit | a8d73a3957c15c455b53c2ea248ad491a267d9c2 (patch) | |
| tree | 6a5ccd839eb6da876914fd1801eef90dece3181b | |
| parent | 4cde9784e01b6024e90c4fe5f1966d91e153707c (diff) | |
| download | coreboot-a8d73a3957c15c455b53c2ea248ad491a267d9c2.tar.xz | |
northbridge/amd/amdmct: Fix Family 15h detection
Change-Id: I3623f8945bd62b7050ec609934f96543552c792b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12018
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mct.h | 3 | ||||
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.h | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct.h b/src/northbridge/amd/amdmct/mct/mct.h index d399eeade4..1af11b1e10 100644 --- a/src/northbridge/amd/amdmct/mct/mct.h +++ b/src/northbridge/amd/amdmct/mct/mct.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -501,7 +502,7 @@ struct DCTStatStruc { /* A per Node structure*/ u32 NodePresent(u32 Node); u32 Get_NB32n(struct DCTStatStruc *pDCTstat, u32 addrx); u32 Get_NB32(u32 addr); /* NOTE: extend addr to 32 bit for bus > 0 */ -u32 mctGetLogicalCPUID(u32 Node); +uint64_t mctGetLogicalCPUID(u32 Node); void K8FInterleaveBanks(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat); diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h index e2d7aa8421..d6e5fb4ca9 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h @@ -772,7 +772,7 @@ u8 mct_Get_Start_RcvrEnDly_1Pass(u8 Pass); u8 mct_Average_RcvrEnDly_Pass(struct DCTStatStruc *pDCTstat, u8 RcvrEnDly, u8 RcvrEnDlyLimit, u8 Channel, u8 Receiver, u8 Pass); void CPUMemTyping_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); void UMAMemTyping_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); -u32 mctGetLogicalCPUID(u32 Node); +uint64_t mctGetLogicalCPUID(u32 Node); u8 ECCInit_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); void TrainReceiverEn_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA, u8 Pass); void mct_TrainDQSPos_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); |