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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-06 12:07:21 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-09 10:50:12 +0000 |
commit | be5317f6d0084b1997ff7342fbf5a5af3eecd950 (patch) | |
tree | d5efa36c5a5ba1a0141663c6a4b0737fe8879eec | |
parent | 9dd1a12f9c3199fe9f678a4997bb163a1eb1bb96 (diff) | |
download | coreboot-be5317f6d0084b1997ff7342fbf5a5af3eecd950.tar.xz |
ELOG: Avoid some preprocessor use
Change-Id: I8daf8868af2e8c2b07b0dda0eeaf863f2f550c59
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36648
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/ec/quanta/ene_kb3940q/ec.c | 10 | ||||
-rw-r--r-- | src/soc/intel/broadwell/me.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/me.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/me_8.x.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/me.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/me_9.x.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/smi.c | 6 |
8 files changed, 13 insertions, 25 deletions
diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 4fc38da99d..5de6336040 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -125,11 +125,11 @@ void ec_mem_write(u8 addr, u8 data) static void ene_kb3940q_log_events(void) { -#if CONFIG(ELOG) - u8 reason = ec_mem_read(EC_SHUTDOWN_REASON); - if (reason) - elog_add_event_byte(ELOG_TYPE_EC_SHUTDOWN, reason); -#endif + if (CONFIG(ELOG)) { + u8 reason = ec_mem_read(EC_SHUTDOWN_REASON); + if (reason) + elog_add_event_byte(ELOG_TYPE_EC_SHUTDOWN, reason); + } } static void ene_kb3940q_init(struct device *dev) diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c index 0461428ba5..0021d2c48a 100644 --- a/src/soc/intel/broadwell/me.c +++ b/src/soc/intel/broadwell/me.c @@ -700,8 +700,7 @@ static me_bios_path intel_me_path(struct device *dev) path = ME_ERROR_BIOS_PATH; } -#if CONFIG(ELOG) - if (path != ME_NORMAL_BIOS_PATH) { + if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { struct elog_event_data_me_extended data = { .current_working_state = hfs.working_state, .operation_state = hfs.operation_state, @@ -715,7 +714,6 @@ static me_bios_path intel_me_path(struct device *dev) elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, &data, sizeof(data)); } -#endif return path; } diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 5e355a110f..8adb95bdb3 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -585,8 +585,7 @@ static me_bios_path intel_me_path(struct device *dev) if (hfs.error_code || hfs.fpt_bad) path = ME_ERROR_BIOS_PATH; -#if CONFIG(ELOG) - if (path != ME_NORMAL_BIOS_PATH) { + if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { struct elog_event_data_me_extended data = { .current_working_state = hfs.working_state, .operation_state = hfs.operation_state, @@ -600,7 +599,6 @@ static me_bios_path intel_me_path(struct device *dev) elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, &data, sizeof(data)); } -#endif return path; } diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index c224cb4903..7af969517d 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -573,8 +573,7 @@ static me_bios_path intel_me_path(struct device *dev) path = ME_ERROR_BIOS_PATH; } -#if CONFIG(ELOG) - if (path != ME_NORMAL_BIOS_PATH) { + if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { struct elog_event_data_me_extended data = { .current_working_state = hfs.working_state, .operation_state = hfs.operation_state, @@ -588,7 +587,6 @@ static me_bios_path intel_me_path(struct device *dev) elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, &data, sizeof(data)); } -#endif return path; } diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 36576563aa..64be11e9f9 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -286,9 +286,7 @@ static void pch_rtc_init(struct device *dev) if (rtc_failed) { reg8 &= ~RTC_BATTERY_DEAD; pci_write_config8(dev, GEN_PMCON_3, reg8); -#if CONFIG(ELOG) elog_add_event(ELOG_TYPE_RTC_RESET); -#endif } printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index c944f63ee1..6aa33cad90 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -469,8 +469,7 @@ static me_bios_path intel_me_path(struct device *dev) if (hfs.error_code || hfs.fpt_bad) path = ME_ERROR_BIOS_PATH; -#if CONFIG(ELOG) - if (path != ME_NORMAL_BIOS_PATH) { + if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { struct elog_event_data_me_extended data = { .current_working_state = hfs.working_state, .operation_state = hfs.operation_state, @@ -484,7 +483,6 @@ static me_bios_path intel_me_path(struct device *dev) elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, &data, sizeof(data)); } -#endif return path; } diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index 1c45e2d99b..429fa42ab1 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -718,8 +718,7 @@ static me_bios_path intel_me_path(struct device *dev) path = ME_ERROR_BIOS_PATH; } -#if CONFIG(ELOG) - if (path != ME_NORMAL_BIOS_PATH) { + if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { struct elog_event_data_me_extended data = { .current_working_state = hfs.working_state, .operation_state = hfs.operation_state, @@ -733,7 +732,6 @@ static me_bios_path intel_me_path(struct device *dev) elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, &data, sizeof(data)); } -#endif return path; } diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index 4fb00b507a..e5c390ef50 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -29,10 +29,10 @@ void smm_southbridge_clear_state(void) { u32 smi_en; -#if CONFIG(ELOG) /* Log events from chipset before clearing */ - pch_log_state(); -#endif + if (CONFIG(ELOG)) + pch_log_state(); + printk(BIOS_DEBUG, "Initializing Southbridge SMI..."); printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", get_pmbase()); |