diff options
author | Aamir Bohra <aamir.bohra@intel.com> | 2020-03-16 19:03:46 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-20 09:40:39 +0000 |
commit | bf48f6ab1127f3ba6a592f17ec49255f3eea5ffd (patch) | |
tree | a6dacce5468cfbf10f8ecfc356c050ca81ba9eea | |
parent | a1c82c5ebee830fa28a1962618bba4946e68f3ba (diff) | |
download | coreboot-bf48f6ab1127f3ba6a592f17ec49255f3eea5ffd.tar.xz |
mb/google/dedede Add Audio support for waddledoo
1. Configure Audio GPIOs.
2. Set i2c4 configuration.
3. Update PCH HDA configuration
TEST=Verify codecs gets listed with aplay -l command.
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Change-Id: Ic0516c7a8fee79ce17343a7f42895d6ef534fec9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39285
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
4 files changed, 60 insertions, 17 deletions
diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name index d083d2dd8a..36c2467055 100644 --- a/src/mainboard/google/dedede/Kconfig.name +++ b/src/mainboard/google/dedede/Kconfig.name @@ -9,6 +9,8 @@ config BOARD_GOOGLE_WADDLEDOO select BOARD_GOOGLE_BASEBOARD_DEDEDE select BASEBOARD_DEDEDE_LAPTOP select BOARD_ROMSIZE_KB_32768 + select DRIVERS_GENERIC_MAX98357A + select DRIVERS_I2C_DA7219 config BOARD_GOOGLE_WADDLEDEE bool "Waddledee" diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index ece9672ae8..865d4ea73c 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -103,6 +103,14 @@ chip soc/intel/tigerlake register "PcieClkSrcClkReq[4]" = "4" register "PcieClkSrcClkReq[5]" = "5" + # Audio related configurations + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkHdaEnable" = "1" + register "PchHdaAudioLinkSspEnable[0]" = "1" + register "PchHdaAudioLinkSspEnable[1]" = "1" + register "PchHdaAudioLinkDmicEnable[0]" = "1" + register "PchHdaAudioLinkDmicEnable[1]" = "1" + # Enable EMMC HS400 mode register "ScsEmmcHs400Enabled" = "1" diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index 390910470e..bdc3de4f70 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -178,11 +178,11 @@ static const struct pad_config gpio_table[] = { /* D15 : UCAM_RST_L */ PAD_NC(GPP_D15, NONE), /* D16 : HP_INT_ODL */ - PAD_NC(GPP_D16, NONE), + PAD_CFG_GPI_INT(GPP_D16, NONE, PLTRST, EDGE_BOTH), /* D17 : EN_SPK */ - PAD_NC(GPP_D17, NONE), + PAD_CFG_GPO(GPP_D17, 1, PLTRST), /* D18 : I2S_MCLK */ - PAD_NC(GPP_D18, NONE), + PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), /* D19 : WWAN_WLAN_COEX1 */ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), /* D20 : WWAN_WLAN_COEX2 */ @@ -319,7 +319,7 @@ static const struct pad_config gpio_table[] = { /* H14 : GPP_H14/AVS_I2S2_RXD */ PAD_NC(GPP_H14, NONE), /* H15 : I2S_SPK_BCLK */ - PAD_NC(GPP_H15, NONE), + PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* H16 : AP_SUB_IO_L */ PAD_NC(GPP_H16, NONE), /* H17 : WWAN_RST_L */ @@ -330,38 +330,40 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO(GPP_H19, 1, DEEP), /* R0 : I2S_HP_BCLK */ - PAD_NC(GPP_R0, NONE), + PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2), /* R1 : I2S_HP_LRCK */ - PAD_NC(GPP_R1, NONE), + PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), /* R2 : I2S_HP_AUDIO */ - PAD_NC(GPP_R2, NONE), + PAD_CFG_NF(GPP_R2, NONE, DEEP, NF2), /* R3 : I2S_HP_MIC */ - PAD_NC(GPP_R3, NONE), + PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), /* R4 : GPP_R04/HDA_RST_N */ PAD_NC(GPP_R4, NONE), /* R5 : GPP_R05/HDA_SDI1/AVS_I2S1_RXD */ PAD_NC(GPP_R5, NONE), /* R6 : I2S_SPK_LRCK */ - PAD_NC(GPP_R6, NONE), - /* R7 : I2S_SPK_AUDIO */ - PAD_NC(GPP_R7, NONE), + PAD_CFG_NF(GPP_R6, NONE, DEEP, NF1), + /* R7 : I2S_SPK_AUDIO */ + PAD_CFG_NF(GPP_R7, NONE, DEEP, NF1), + /* S0 : RAM_STRAP_4 */ PAD_NC(GPP_S0, NONE), /* S1 : RSVD_STRAP */ PAD_NC(GPP_S1, NONE), /* S2 : DMIC1_CLK */ - PAD_NC(GPP_S2, NONE), + PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), /* S3 : DMIC1_DATA */ - PAD_NC(GPP_S3, NONE), + PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), /* S4 : GPP_S04/SNDW1_CLK */ PAD_NC(GPP_S4, NONE), /* S5 : GPP_S05/SNDW1_DATA */ PAD_NC(GPP_S5, NONE), - /* S6 : DMIC0_CLK */ - PAD_NC(GPP_S6, NONE), + /* S6 : DMIC0_CLK */ + PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2), /* S7 : DMIC0_DATA */ - PAD_NC(GPP_S7, NONE), + PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), + /* GPD0 : AP_BATLOW_L */ PAD_CFG_NF(GPD0, NONE, DEEP, NF1), diff --git a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb index 9860e3de46..884199c4c5 100644 --- a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb +++ b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb @@ -36,6 +36,12 @@ chip soc/intel/tigerlake }, .i2c[4] = { .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 176, + .scl_hcnt = 95, + .sda_hold = 36, + } }, }" device domain 0 on @@ -49,12 +55,37 @@ chip soc/intel/tigerlake device i2c 15 on end end end #I2C 0 - device pci 1c.7 on chip drivers/intel/wifi register "wake" = "GPE0_DW2_03" device pci 00.0 on end end end # PCI Express Root Port 8 - WLAN + device pci 19.0 on + chip drivers/i2c/da7219 + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end #I2C 4 + device pci 1f.3 on + chip drivers/generic/max98357a + register "hid" = ""MX98360A"" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D17)" + device generic 0 on end + end + end # Intel HDA end end |