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| author | Furquan Shaikh <furquan@google.com> | 2018-08-08 18:44:54 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2018-08-12 17:58:25 +0000 |
| commit | c3cbbe6a783aa4f6b7deca7f5ccf024d21727558 (patch) | |
| tree | b6244f27cc2425026e3a77dbeea6ae9edcd80dce | |
| parent | 19ab8139e82679a0e337ea9038b69219af913806 (diff) | |
| download | coreboot-c3cbbe6a783aa4f6b7deca7f5ccf024d21727558.tar.xz | |
mb/google/octopus: Use correct chip for CNVi device
This change uses drivers/intel/wifi chip for CNVi device to ensure
that:
1. Correct device name shows up in ACPI node
2. It is possible to pass any parameters from devicetree to wifi
driver for SSDT generation.
BUG=b:112371978
Change-Id: Ia49820dd4f9cf2e0a9ef14931fbddd8a723208c0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27968
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index 01fd05f2e9..cec4ba7686 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -112,7 +112,10 @@ chip soc/intel/apollolake device pci 00.2 off end # - NPK device pci 02.0 on end # - Gen device pci 03.0 on end # - Iunit - device pci 0c.0 on end # - CNVi + chip drivers/intel/wifi + register "wake" = "GPE0A_CNVI_PME_STS" + device pci 0c.0 on end # - CNVi + end device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - Fast SPI |