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authorFabian Kunkel <fabi@adv.bruhnspace.com>2016-07-18 17:39:28 +0200
committerMartin Roth <martinroth@google.com>2016-07-22 18:56:42 +0200
commitcc19806ae7554edb936f729511c2041366d6775b (patch)
treecb7c073726bd11dd5f7891cda546a76c21f9f3d2
parentfc4c15b9e200a1d2bf2e51206e1d1b17f79a1578 (diff)
downloadcoreboot-cc19806ae7554edb936f729511c2041366d6775b.tar.xz
amd/agesa/f16kb: Allow SATA Gen3
YangtzeSataResetService implements the SataSetMaxGen2 double. The value should be only set, if the condition is met. For testing, add FchParams_env->Sata.SataMode.SataSetMaxGen2 = FALSE; to your BiosCallOuts.c, which enables GEN3 for the SATA ports. Patch is tested with bap/e20xx board, Lubuntu 16.04 Kernel 4.4. $ dmesg | grep ahci #before patch ahci 0000:00:11.0: AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode $ dmesg | grep ahci #after patch ahci 0000:00:11.0: AHCI 0001.0300 32 slots 2 ports 6 Gbps 0x3 impl SATA mode Change-Id: I17a493b876a4be3236736b2116b331e465b159af Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com> Reviewed-on: https://review.coreboot.org/15728 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c
index 9b1446783e..31428990d3 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c
@@ -78,7 +78,6 @@ FchInitResetSataProgram (
if ( LocalCfgPtr->SataSetMaxGen2 ) {
FchSataMode |= 0x04;
}
- FchSataMode |= 0x04;
RwPci (((SATA_BUS_DEV_FUN << 16) + 0x0A0), AccessWidth8, (UINT32)~(BIT2 + BIT3 + BIT4 + BIT5 + BIT6), 0, StdHeader);
FchSataClkMode = LocalCfgPtr->SataClkMode;