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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-27 07:13:55 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-11-14 20:58:43 +0000 |
| commit | d3c58fdc6436b2c4455b07fe764fcae471a65433 (patch) | |
| tree | ba640e7839435bea341bf796a2e63921594a72de | |
| parent | 211792feaba4a5cc26b4e3f17e905c3e899eb07f (diff) | |
| download | coreboot-d3c58fdc6436b2c4455b07fe764fcae471a65433.tar.xz | |
soc/qualcomm: Link cbmem.c only in romstage
Change-Id: I008fcca024fecf462c4b550b8dedbf4b06e491b8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36368
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/gale/mmu.c | 3 | ||||
| -rw-r--r-- | src/mainboard/google/storm/mmu.c | 7 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/cbmem.c | 2 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq806x/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq806x/cbmem.c | 2 |
6 files changed, 7 insertions, 10 deletions
diff --git a/src/mainboard/google/gale/mmu.c b/src/mainboard/google/gale/mmu.c index bf46f7a0d9..7ac8b9207a 100644 --- a/src/mainboard/google/gale/mmu.c +++ b/src/mainboard/google/gale/mmu.c @@ -38,7 +38,8 @@ void setup_dram_mappings(enum dram_state dram) /* Map DMA memory */ mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF); /* Mark cbmem backing store as ready. */ - ipq_cbmem_backing_store_ready(); + if (ENV_ROMSTAGE) + ipq_cbmem_backing_store_ready(); } else { mmu_disable_range(DRAM_START, DRAM_SIZE); /* Map DMA memory */ diff --git a/src/mainboard/google/storm/mmu.c b/src/mainboard/google/storm/mmu.c index 9750cc16e8..3f1515ab06 100644 --- a/src/mainboard/google/storm/mmu.c +++ b/src/mainboard/google/storm/mmu.c @@ -35,10 +35,9 @@ void setup_dram_mappings(enum dram_state dram) mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); /* Map DMA memory */ mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF); -#if ENV_ROMSTAGE - /* Mark cbmem backing store as ready. */ - ipq_cbmem_backing_store_ready(); -#endif + if (ENV_ROMSTAGE) + /* Mark cbmem backing store as ready. */ + ipq_cbmem_backing_store_ready(); } else { mmu_disable_range(DRAM_START, DRAM_SIZE); /* Map DMA memory */ diff --git a/src/soc/qualcomm/ipq40xx/Makefile.inc b/src/soc/qualcomm/ipq40xx/Makefile.inc index 6447acf1d6..b20ae24d60 100644 --- a/src/soc/qualcomm/ipq40xx/Makefile.inc +++ b/src/soc/qualcomm/ipq40xx/Makefile.inc @@ -16,7 +16,6 @@ ifeq ($(CONFIG_SOC_QC_IPQ40XX),y) bootblock-y += clock.c -bootblock-y += cbmem.c bootblock-y += gpio.c bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-y += timer.c @@ -43,7 +42,6 @@ romstage-y += blsp.c romstage-y += qup.c ramstage-y += blobs_init.c -ramstage-y += cbmem.c ramstage-y += clock.c ramstage-y += gpio.c ramstage-y += lcc.c diff --git a/src/soc/qualcomm/ipq40xx/cbmem.c b/src/soc/qualcomm/ipq40xx/cbmem.c index 972c6258c9..9970758d91 100644 --- a/src/soc/qualcomm/ipq40xx/cbmem.c +++ b/src/soc/qualcomm/ipq40xx/cbmem.c @@ -31,7 +31,7 @@ void *cbmem_top_chipset(void) * with components that utilize cbmem in romstage (e.g. vboot_locator * for loading ipq blobs before DRAM is initialized). */ - if (ENV_ROMSTAGE && (cbmem_backing_store_ready == 0)) + if (cbmem_backing_store_ready == 0) return NULL; return _memlayout_cbmem_top; diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc index 1fd134a7b3..67d54d2b98 100644 --- a/src/soc/qualcomm/ipq806x/Makefile.inc +++ b/src/soc/qualcomm/ipq806x/Makefile.inc @@ -42,7 +42,6 @@ romstage-y += gsbi.c romstage-y += qup.c ramstage-y += blobs_init.c -ramstage-y += cbmem.c ramstage-y += clock.c ramstage-y += gpio.c ramstage-y += lcc.c diff --git a/src/soc/qualcomm/ipq806x/cbmem.c b/src/soc/qualcomm/ipq806x/cbmem.c index 6dc92a0c11..32f303e81e 100644 --- a/src/soc/qualcomm/ipq806x/cbmem.c +++ b/src/soc/qualcomm/ipq806x/cbmem.c @@ -32,7 +32,7 @@ void *cbmem_top_chipset(void) * (e.g. vboot_locator for loading ipq blobs before DRAM is * initialized). */ - if (ENV_ROMSTAGE && (cbmem_backing_store_ready == 0)) + if (cbmem_backing_store_ready == 0) return NULL; return _memlayout_cbmem_top; |