diff options
| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-05 12:24:23 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-05 12:24:23 +0000 |
| commit | dec1b47bd721bbee2f1982b20e374f3615519f5b (patch) | |
| tree | 8ca4c403044c0563ccbd425b6c77a842e880a345 | |
| parent | 313973d61a930bbc9859a4d09ae3313f955572a1 (diff) | |
| download | coreboot-dec1b47bd721bbee2f1982b20e374f3615519f5b.tar.xz | |
Add some more CONFIG_* prefixes that were missing.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4497 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_lpc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_power.h | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_smihandler.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_lpc.c b/src/southbridge/intel/i82801gx/i82801gx_lpc.c index f42471f3ef..97a6ed2d30 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_lpc.c +++ b/src/southbridge/intel/i82801gx/i82801gx_lpc.c @@ -273,7 +273,7 @@ static void i82801gx_power_options(device_t dev) /* Set up power management block and determine sleep mode */ pmbase = pci_read_config16(dev, 0x40) & 0xfffe; reg32 = inl(pmbase + 0x04); // PM1_CNT -#if HAVE_ACPI_RESUME +#if CONFIG_HAVE_ACPI_RESUME acpi_slp_type = (((reg32 >> 10) & 7) == 5) ? 3 : 0; printk_debug("PM1_CNT: 0x%08x --> acpi_sleep_type: %x\n", reg32, acpi_slp_type); diff --git a/src/southbridge/intel/i82801gx/i82801gx_power.h b/src/southbridge/intel/i82801gx/i82801gx_power.h index d2eb8b430d..9e6be5c232 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_power.h +++ b/src/southbridge/intel/i82801gx/i82801gx_power.h @@ -23,7 +23,7 @@ #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 -#ifndef MAINBOARD_POWER_ON_AFTER_FAIL -#define MAINBOARD_POWER_ON_AFTER_FAIL MAINBOARD_POWER_ON +#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL +#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON #endif diff --git a/src/southbridge/intel/i82801gx/i82801gx_smihandler.c b/src/southbridge/intel/i82801gx/i82801gx_smihandler.c index 94207d0e4d..6e6885e76a 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_smihandler.c +++ b/src/southbridge/intel/i82801gx/i82801gx_smihandler.c @@ -300,7 +300,7 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat * CMOS or even better from GNVS. Right now it's hard * coded at compile time. */ - u8 s5pwr = MAINBOARD_POWER_ON_AFTER_FAIL; + u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; /* First, disable further SMIs */ reg8 = inb(pmbase + SMI_EN); |