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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-16 00:19:52 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-16 00:19:52 +0000 |
commit | e7b11577641b3f78eda07000583ebdd5e62fed4c (patch) | |
tree | 5b33a2d341b342bc48054de13cf9ee9843ea230e | |
parent | 8e8eb7d261dcc2c10d7f25ad9b58bd47c2263a2f (diff) | |
download | coreboot-e7b11577641b3f78eda07000583ebdd5e62fed4c.tar.xz |
Enable IT8716F LPC-to-SPI write cycle translation in flashrom if the
IT8716F decodes any address to the attached SPI ROM.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | util/flashrom/it87spi.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/util/flashrom/it87spi.c b/util/flashrom/it87spi.c index 1fd330913b..75010df5ea 100644 --- a/util/flashrom/it87spi.c +++ b/util/flashrom/it87spi.c @@ -93,6 +93,12 @@ static uint16_t find_ite_spi_flash_port(uint16_t port) 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis"); printf("LPC write to serial flash %sabled\n", (tmp & 1 << 4) ? "en" : "dis"); + /* If any serial flash segment is enabled, enable writing. */ + if ((tmp & 0xe) && (!(tmp & 1 << 4))) { + printf("Enabling LPC write to serial flash\n"); + tmp |= 1 << 4; + regwrite(port, 0x24, tmp); + } printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); /* LDN 0x7, reg 0x64/0x65 */ regwrite(port, 0x07, 0x7); |