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| author | Patrick Rudolph <siro@das-labor.org> | 2017-06-20 17:49:53 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2017-07-12 16:04:48 +0000 |
| commit | fa47042e1c4fc028a46e870c574e58b446475b91 (patch) | |
| tree | 16a1925b052bf0c7e778a0627ccc6af98d811aa7 | |
| parent | 54db255529ce8afc689ae425c24b7fb1d45654e8 (diff) | |
| download | coreboot-fa47042e1c4fc028a46e870c574e58b446475b91.tar.xz | |
drv/intel/gma/opregion: Add function to set ASLS register
Add a new method to set ASLS register that holds the
ACPI OpRegion base address.
Change-Id: I4850500ac6d58f80b0eddc81514053c87774405c
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/drivers/intel/gma/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/drivers/intel/gma/opregion.c | 48 | ||||
| -rw-r--r-- | src/drivers/intel/gma/opregion.h | 2 |
3 files changed, 51 insertions, 0 deletions
diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc index 43779a590f..50494e19de 100644 --- a/src/drivers/intel/gma/Makefile.inc +++ b/src/drivers/intel/gma/Makefile.inc @@ -19,6 +19,7 @@ ifeq ($(CONFIG_VGA_ROM_RUN),y) ramstage-$(CONFIG_INTEL_INT15) += int15.c endif ramstage-$(CONFIG_INTEL_GMA_ACPI) += acpi.c +ramstage-$(CONFIG_INTEL_GMA_ACPI) += opregion.c ifeq ($(CONFIG_MAINBOARD_USE_LIBGFXINIT),y) diff --git a/src/drivers/intel/gma/opregion.c b/src/drivers/intel/gma/opregion.c new file mode 100644 index 0000000000..ab9093b82f --- /dev/null +++ b/src/drivers/intel/gma/opregion.c @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2, or (at your option) + * any later verion of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include "opregion.h" + +/* Write ASLS PCI register and prepare SWSCI register. */ +void intel_gma_opregion_register(uintptr_t opregion) +{ + device_t igd; + u16 reg16; + + igd = dev_find_slot(0, PCI_DEVFN(0x2, 0)); + if (!igd || !igd->enabled) + return; + + /* + * Intel BIOS Specification + * Chapter 5.3.7 "Initialize Hardware State" + */ + pci_write_config32(igd, ASLS, opregion); + + /* + * Intel's Windows driver relies on this: + * Intel BIOS Specification + * Chapter 5.4 "ASL Software SCI Handler" + */ + reg16 = pci_read_config16(igd, SWSCI); + reg16 &= ~GSSCIE; + reg16 |= SMISCISEL; + pci_write_config16(igd, SWSCI, reg16); +} diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h index eebea58b5a..e3866933cd 100644 --- a/src/drivers/intel/gma/opregion.h +++ b/src/drivers/intel/gma/opregion.h @@ -245,4 +245,6 @@ typedef struct { u8 coreblock_biossignon[155]; } __attribute__((packed)) optionrom_vbt_t; +void intel_gma_opregion_register(uintptr_t opregion); + #endif /* _COMMON_GMA_H_ */ |