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authorBen Gardner <gardner.ben@gmail.com>2015-12-07 11:33:45 -0600
committerPatrick Georgi <pgeorgi@google.com>2015-12-10 08:25:47 +0100
commitfad23134009291a7b992c1323ca815421a4b557d (patch)
treef4595f5ef9dc3aadea9c9e788e9772233cf771ef
parent7e7a4df58075fdff4293d2203b035b970d21aeb8 (diff)
downloadcoreboot-fad23134009291a7b992c1323ca815421a4b557d.tar.xz
intel/fsp_baytrail: Remove code for nonexistant BBAR
The BBAR register (BIOS Base Address Configuration Register) defined in the ICH9 datasheet does not exist in the Bay Trail E3800 datasheet. Accessing it seems harmless, but should likely be avoided. Change-Id: I5d9a6a1ccead84c8996796f516a2bdc5f248cfef Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-on: https://review.coreboot.org/12671 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c17
1 files changed, 1 insertions, 16 deletions
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 2719373d95..adbc0e2fc3 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -77,8 +77,7 @@ typedef struct ich9_spi_regs {
uint16_t preop;
uint16_t optype;
uint8_t opmenu[8];
- uint32_t bbar;
- uint8_t _reserved3[12];
+ uint8_t _reserved3[16];
uint32_t fdoc;
uint32_t fdod;
uint8_t _reserved4[8];
@@ -105,7 +104,6 @@ typedef struct ich_spi_controller {
unsigned databytes;
uint8_t *status;
uint16_t *control;
- uint32_t *bbar;
} ich_spi_controller;
static ich_spi_controller cntlr;
@@ -248,17 +246,6 @@ static void read_reg(const void *src, void *value, uint32_t size)
}
}
-static void ich_set_bbar(uint32_t minaddr)
-{
- const uint32_t bbar_mask = 0x00ffff00;
- uint32_t ichspi_bbar;
-
- minaddr &= bbar_mask;
- ichspi_bbar = readl_(cntlr.bbar) & ~bbar_mask;
- ichspi_bbar |= minaddr;
- writel_(ichspi_bbar, cntlr.bbar);
-}
-
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
@@ -304,9 +291,7 @@ void spi_init(void)
cntlr.databytes = sizeof(ich9_spi->fdata);
cntlr.status = &ich9_spi->ssfs;
cntlr.control = (uint16_t *)ich9_spi->ssfc;
- cntlr.bbar = &ich9_spi->bbar;
cntlr.preop = &ich9_spi->preop;
- ich_set_bbar(0);
}
int spi_claim_bus(struct spi_slave *slave)