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authorAngel Pons <th3fanbus@gmail.com>2021-04-05 12:03:08 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-04-08 06:47:15 +0000
commit00f53a8d9e18e75aaa44886e083580033a935a70 (patch)
tree348780e75f636646aaba1c7caee19af4963de19d
parent3993d38ae6ea85a8d05349e6d7534f4cde9ba9ae (diff)
downloadcoreboot-00f53a8d9e18e75aaa44886e083580033a935a70.tar.xz
soc/intel/skylake: Drop unnecessary `ignore_vtd` option
It is zero for all mainboards. If one really wanted to ignore VT-d support, a user-visible Kconfig option would be a better approach. Change-Id: I320c10317f3fabee5443c16ebdf1ffd0e24193b8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
-rw-r--r--src/mainboard/protectli/vault_kbl/devicetree.cb3
-rw-r--r--src/soc/intel/skylake/acpi.c3
-rw-r--r--src/soc/intel/skylake/chip.c2
-rw-r--r--src/soc/intel/skylake/chip.h3
-rw-r--r--src/soc/intel/skylake/romstage/systemagent.c5
-rw-r--r--src/soc/intel/skylake/systemagent.c3
6 files changed, 3 insertions, 16 deletions
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index abbfda4223..dc73f91478 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -22,9 +22,6 @@ chip soc/intel/skylake
# Disable DPTF
register "dptf_enable" = "0"
- # Enable VT-d
- register "ignore_vtd" = "0"
-
# Enable SERIRQ continuous
register "serirq_mode" = "SERIRQ_CONTINUOUS"
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 0d89f29e7e..3434aac9bb 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -460,11 +460,10 @@ unsigned long northbridge_write_acpi_tables(const struct device *const dev,
unsigned long current,
struct acpi_rsdp *const rsdp)
{
- const struct soc_intel_skylake_config *const config = config_of(dev);
acpi_dmar_t *const dmar = (acpi_dmar_t *)current;
/* Create DMAR table only if we have VT-d capability. */
- if (config->ignore_vtd || !soc_is_vtd_capable())
+ if (!soc_is_vtd_capable())
return current;
printk(BIOS_DEBUG, "ACPI: * DMAR\n");
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 0ae98a9e0d..d4d8938d8f 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -524,7 +524,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchIoApicBdfValid = 0;
/* Enable VT-d and X2APIC */
- if (!config->ignore_vtd && soc_is_vtd_capable()) {
+ if (soc_is_vtd_capable()) {
params->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
params->VtdBaseAddress[1] = VTVC0_BASE_ADDRESS;
params->X2ApicOptOut = 0;
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 99eb8e653f..1c8ca49632 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -78,9 +78,6 @@ struct soc_intel_skylake_config {
/* TCC activation offset */
uint32_t tcc_offset;
- /* Whether to ignore VT-d support of the SKU */
- int ignore_vtd;
-
/*
* System Agent dynamic frequency configuration
* When enabled memory will be trained at two different frequencies.
diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c
index f22fd532e7..8996bce1a7 100644
--- a/src/soc/intel/skylake/romstage/systemagent.c
+++ b/src/soc/intel/skylake/romstage/systemagent.c
@@ -13,11 +13,6 @@
static void systemagent_vtd_init(void)
{
const struct device *const igd_dev = pcidev_path_on_root(SA_DEVFN_IGD);
- const struct soc_intel_skylake_config *config = NULL;
-
- config = config_of_soc();
- if (config->ignore_vtd)
- return;
const bool vtd_capable =
!(pci_read_config32(SA_DEV_ROOT, CAPID0_A) & VTD_DISABLE);
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
index 785a5e6607..8b644354ab 100644
--- a/src/soc/intel/skylake/systemagent.c
+++ b/src/soc/intel/skylake/systemagent.c
@@ -39,12 +39,11 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
{ GDXCBAR, GDXC_BASE_ADDRESS, GDXC_BASE_SIZE, "GDXCBAR" },
{ EDRAMBAR, EDRAM_BASE_ADDRESS, EDRAM_BASE_SIZE, "EDRAMBAR" },
};
- const struct soc_intel_skylake_config *const config = config_of(dev);
sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources,
ARRAY_SIZE(soc_fixed_resources));
- if (!config->ignore_vtd && soc_is_vtd_capable()) {
+ if (soc_is_vtd_capable()) {
if (igd_dev && igd_dev->enabled)
sa_add_fixed_mmio_resources(dev, index,
&soc_gfxvt_mmio_descriptor, 1);