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authorElyes HAOUAS <ehaouas@noos.fr>2020-03-30 16:45:35 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-03-31 17:00:56 +0000
commit12eef084fda2d02a2ad364ba80dfe5f2cf407d85 (patch)
tree14dc7e0403bd3e9684767298743c03f0a3cdcdfc
parent7774de53d49b612888603824f24ea5f258feeba1 (diff)
downloadcoreboot-12eef084fda2d02a2ad364ba80dfe5f2cf407d85.tar.xz
superio/ite: Improve code formatting
Change-Id: I014659aaddeb9fa2d5c3c3583e9379be4f9db69b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39929 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/superio/ite/common/early_serial.c12
-rw-r--r--src/superio/ite/common/env_ctrl.c6
-rw-r--r--src/superio/ite/it8720f/acpi/superio.asl2
-rw-r--r--src/superio/ite/it8721f/acpi/superio.asl2
-rw-r--r--src/superio/ite/it8783ef/acpi/superio.asl2
-rw-r--r--src/superio/ite/it8786e/acpi/superio.asl5
6 files changed, 13 insertions, 16 deletions
diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c
index fa881a07f6..c143c712e8 100644
--- a/src/superio/ite/common/early_serial.c
+++ b/src/superio/ite/common/early_serial.c
@@ -8,12 +8,12 @@
#include "ite.h"
/* Global configuration registers. */
-#define ITE_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
-#define ITE_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
-#define ITE_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
-#define ITE_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
-#define ITE_CONFIG_REG_MFC 0x2a /* multi function pin */
-#define ITE_CONFIG_REG_WATCHDOG 0x72 /* watchdog config */
+#define ITE_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
+#define ITE_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
+#define ITE_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
+#define ITE_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
+#define ITE_CONFIG_REG_MFC 0x2a /* multi function pin */
+#define ITE_CONFIG_REG_WATCHDOG 0x72 /* watchdog config */
/* Helper procedure */
static void ite_sio_write(pnp_devfn_t dev, u8 reg, u8 value)
diff --git a/src/superio/ite/common/env_ctrl.c b/src/superio/ite/common/env_ctrl.c
index 23fd87dd9e..1082cf8163 100644
--- a/src/superio/ite/common/env_ctrl.c
+++ b/src/superio/ite/common/env_ctrl.c
@@ -81,8 +81,7 @@ static void enable_tmpin(const u16 base, const u8 tmpin,
reg |= ITE_EC_ADC_TEMP_RESISTOR_MODE(tmpin);
break;
default:
- printk(BIOS_WARNING,
- "Unsupported thermal mode 0x%x on TMPIN%d\n",
+ printk(BIOS_WARNING, "Unsupported thermal mode 0x%x on TMPIN%d\n",
conf->mode, tmpin);
return;
}
@@ -185,8 +184,7 @@ static void enable_fan(const u16 base, const u8 fan,
pnp_write_hwm5_index(base, ITE_EC_FAN_CTL_MODE, reg);
}
- if (CONFIG(SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG)
- && conf->mode >= FAN_MODE_ON) {
+ if (CONFIG(SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG) && conf->mode >= FAN_MODE_ON) {
reg = pnp_read_hwm5_index(base, ITE_EC_FAN_TAC_COUNTER_ENABLE);
reg |= ITE_EC_FAN_TAC_16BIT_ENABLE(fan);
pnp_write_hwm5_index(base, ITE_EC_FAN_TAC_COUNTER_ENABLE, reg);
diff --git a/src/superio/ite/it8720f/acpi/superio.asl b/src/superio/ite/it8720f/acpi/superio.asl
index 4f3a8e0b9f..9ad2b87775 100644
--- a/src/superio/ite/it8720f/acpi/superio.asl
+++ b/src/superio/ite/it8720f/acpi/superio.asl
@@ -50,7 +50,7 @@ Device(SUPERIO_DEV) {
Field (CREG, ByteAcc, NoLock, Preserve)
{
PNP_ADDR_REG, 8,
- PNP_DATA_REG, 8
+ PNP_DATA_REG, 8
}
IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve)
{
diff --git a/src/superio/ite/it8721f/acpi/superio.asl b/src/superio/ite/it8721f/acpi/superio.asl
index 0679159332..ca876195dc 100644
--- a/src/superio/ite/it8721f/acpi/superio.asl
+++ b/src/superio/ite/it8721f/acpi/superio.asl
@@ -50,7 +50,7 @@ Device(SUPERIO_DEV) {
Field (CREG, ByteAcc, NoLock, Preserve)
{
PNP_ADDR_REG, 8,
- PNP_DATA_REG, 8
+ PNP_DATA_REG, 8
}
IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve)
{
diff --git a/src/superio/ite/it8783ef/acpi/superio.asl b/src/superio/ite/it8783ef/acpi/superio.asl
index 67dcf2692c..f3643ece6e 100644
--- a/src/superio/ite/it8783ef/acpi/superio.asl
+++ b/src/superio/ite/it8783ef/acpi/superio.asl
@@ -56,7 +56,7 @@ Device(SUPERIO_DEV) {
Field (CREG, ByteAcc, NoLock, Preserve)
{
PNP_ADDR_REG, 8,
- PNP_DATA_REG, 8
+ PNP_DATA_REG, 8
}
IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve)
{
diff --git a/src/superio/ite/it8786e/acpi/superio.asl b/src/superio/ite/it8786e/acpi/superio.asl
index ba210bd0dd..dc45b60fd2 100644
--- a/src/superio/ite/it8786e/acpi/superio.asl
+++ b/src/superio/ite/it8786e/acpi/superio.asl
@@ -55,7 +55,7 @@ Device (SUPERIO_DEV) {
Field (CREG, ByteAcc, NoLock, Preserve)
{
PNP_ADDR_REG, 8,
- PNP_DATA_REG, 8
+ PNP_DATA_REG, 8
}
IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve)
{
@@ -83,8 +83,7 @@ Device (SUPERIO_DEV) {
{
/* Announce the used i/o ports to the OS */
Return (ResourceTemplate () {
- IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE,
- 0x01, 0x02)
+ IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02)
})
}