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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-29 07:03:14 +0300 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-30 11:06:12 +0000 |
commit | 1463a2a04d4ffcf7afbb7870502bf65d4ebcdca1 (patch) | |
tree | 8b4ef57eadfe6e87836bac9e46c98548686eee91 | |
parent | 92bb8320d62449207b45f5a76a011f1eacfdbd4f (diff) | |
download | coreboot-1463a2a04d4ffcf7afbb7870502bf65d4ebcdca1.tar.xz |
getac/p470: Drop unused PCI secondary bus reset
Change-Id: I959cdc08d43fea28f8bbc649cd46bab5656d6ca8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35674
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-rw-r--r-- | src/mainboard/getac/p470/romstage.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index ff4c99ed4d..a7c64bd98b 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -237,13 +237,6 @@ void mainboard_romstage_entry(void) enable_lapic(); -#if 0 - /* Force PCIRST# */ - pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR); - udelay(200 * 1000); - pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0); -#endif - ich7_enable_lpc(); early_superio_config(); |