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| author | Felix Singer <felixsinger@posteo.net> | 2020-09-05 05:28:42 +0000 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-09-07 20:09:34 +0000 |
| commit | 1a8c0defd7f8dc4fab7f7d17ea54b6a32fa22a40 (patch) | |
| tree | d1f70a6c667d80977c09d4c9bece6af50795a283 | |
| parent | f0a88502597626b4c98d4c330ebcac42dad751af (diff) | |
| download | coreboot-1a8c0defd7f8dc4fab7f7d17ea54b6a32fa22a40.tar.xz | |
mb/system76/lemp9: Add comments to SATA ports
Change-Id: I8db3bfbdb557a84413408b4b39a13b24c45497cc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
| -rw-r--r-- | src/mainboard/system76/lemp9/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb index 2f36f05b72..c7d644f7d3 100644 --- a/src/mainboard/system76/lemp9/devicetree.cb +++ b/src/mainboard/system76/lemp9/devicetree.cb @@ -173,8 +173,10 @@ chip soc/intel/cannonlake device pci 17.0 on # SATA register "SataMode" = "Sata_AHCI" register "SataSalpSupport" = "0" + # Port 2 (J_SSD2) register "SataPortsEnable[1]" = "1" register "SataPortsDevSlp[1]" = "1" + # Port 3 (J_SSD1) register "SataPortsEnable[2]" = "1" register "SataPortsDevSlp[2]" = "1" end |